[PATCH v2 2/3] arm64: dts: rockchip: Add VPU support for RK3568/RK3566

[Ezequiel Garcia]

Hi Heiko,

On Sun, Mar 20, 2022 at 9:37 AM Ezequiel Garcia
<ezequiel at vanguardiasur.com.ar> wrote:
>
> On Mon, Feb 14, 2022 at 10:29:54PM +0100, Piotr Oniszczuk wrote:
> > From: Piotr Oniszczuk <piotr.oniszczuk at gmail.com>
> >
> > RK356x has Hantro G1 video decoder capable to decode MPEG2/H.264/VP8
> > video formats.
> >
> > This patch enables RK356x video decoder in RK356x device-tree
> > include.
> >
> > Tested on [1] with FFmpeg v4l2_request code taken from [2]
> > with MPEG2, H.642 and VP8 samples with results [3].
> >
> > [1] https://github.com/warpme/minimyth2
> > [2] https://github.com/LibreELEC/LibreELEC.tv/blob/master/packages/multimedia/ffmpeg/patches/v4l2-request/ffmpeg-001-v4l2-request.patch
> > [3] https://github.com/warpme/minimyth2/blob/master/video-test-summary.txt
> >
> > Signed-off-by: Piotr Oniszczuk <piotr.oniszczuk at gmail.com>
>
> Reviewed-by: Ezequiel Garcia <ezequiel at vanguardiasur.com.ar>
>

Looks like this slipped thru the cracks.

Any chance it gets queued?

Thanks,
Ezequiel

> Thanks,
> Ezequiel
>
> > ---
> >  arch/arm64/boot/dts/rockchip/rk356x.dtsi | 20 ++++++++++++++++++++
> >  1 file changed, 20 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> > index a68033a23975..33ecaafa8cb7 100644
> > --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> > +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> > @@ -390,6 +390,26 @@ power-domain at RK3568_PD_RKVENC {
> >               };
> >       };
> >
> > +     vpu: video-codec at fdea0400 {
> > +             compatible = "rockchip,rk3568-vpu";
> > +             reg = <0x0 0xfdea0000 0x0 0x800>;
> > +             interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
> > +             clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
> > +             clock-names = "aclk", "hclk";
> > +             iommus = <&vdpu_mmu>;
> > +             power-domains = <&power RK3568_PD_VPU>;
> > +     };
> > +
> > +     vdpu_mmu: iommu at fdea0800 {
> > +             compatible = "rockchip,rk3568-iommu";
> > +             reg = <0x0 0xfdea0800 0x0 0x40>;
> > +             interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
> > +             clock-names = "aclk", "iface";
> > +             clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
> > +             power-domains = <&power RK3568_PD_VPU>;
> > +             #iommu-cells = <0>;
> > +     };
> > +
> >       sdmmc2: mmc at fe000000 {
> >               compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc";
> >               reg = <0x0 0xfe000000 0x0 0x4000>;
> > --
> > 2.29.2
> >