[PATCH] drm/bridge: synopsys/dw-hdmi: set cec clock rate

[Sascha Hauer]

Hi Peter,

On Wed, Jan 26, 2022 at 03:24:26PM -0500, Peter Geis wrote:
> The hdmi-cec clock must be 32khz in order for cec to work correctly.
> Ensure after enabling the clock we set it in order for the hardware to
> work as expected.
> Warn on failure, in case this is a static clock that is slighty off.
> Fixes hdmi-cec support on Rockchip devices.

You removed this sentence in v2, but I just wanted to mention that
clk_set_rate() won't fail when the desired clock rate can't be
archieved. Instead, you will get the best rate that actually can be
reached. If you want to check that you are happy with the rate you'll
have to do a clk_round_rate() before setting the rate or a
clk_get_rate() afterwards.

Sascha

-- 
Pengutronix e.K.                           |                             |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |