[PATCHv6 3/7] arm64: dts: rockchip: Add base DT for rk3588 SoC

[Sebastian Reichel]

Hi,

On Thu, Dec 15, 2022 at 09:22:28AM +0000, Marc Zyngier wrote:
> On Wed, 14 Dec 2022 18:22:43 +0000,
> Sebastian Reichel <sebastian.reichel at collabora.com> wrote:
> > 
> > From: Kever Yang <kever.yang at rock-chips.com>
> > 
> > This initial version supports (single core) CPU, dma, interrupts, timers,
> > UART and SDHCI. In short - everything necessary to boot Linux on this
> > system on chip.
> 
> Single core? The DT indicates otherwise.

oops, that's a still from v0 (missing from the changelog since that
was a big rk3588 series also containing the required driver changes).
I will update the commit message in PATCHv7.

> 
> > 
> > The DT is split into rk3588 and rk3588s, which is a reduced version
> > (i.e. with less peripherals) of the former.
> > 
> > Signed-off-by: Yifeng Zhao <yifeng.zhao at rock-chips.com>
> > Signed-off-by: Elaine Zhang <zhangqing at rock-chips.com>
> > Signed-off-by: Sugar Zhang <sugar.zhang at rock-chips.com>
> > Signed-off-by: Kever Yang <kever.yang at rock-chips.com>
> > [rebase, squash and reword commit message]
> > Signed-off-by: Sebastian Reichel <sebastian.reichel at collabora.com>
> > ---
> >  arch/arm64/boot/dts/rockchip/rk3588.dtsi  |   58 +
> >  arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 1703 +++++++++++++++++++++
> >  2 files changed, 1761 insertions(+)
> >  create mode 100644 arch/arm64/boot/dts/rockchip/rk3588.dtsi
> >  create mode 100644 arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> > 
> 
> [...]
> 
> > +	gic: interrupt-controller at fe600000 {
> > +		compatible = "arm,gic-v3";
> > +		reg = <0x0 0xfe600000 0 0x10000>, /* GICD */
> > +		      <0x0 0xfe680000 0 0x100000>; /* GICR */
> > +		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
> > +		interrupt-controller;
> > +		mbi-alias = <0x0 0xfe610000>;
> > +		mbi-ranges = <424 56>;
> > +		msi-controller;
> > +		#interrupt-cells = <4>;
> > +
> > +		ppi-partitions {
> > +			ppi_cluster0: interrupt-partition-0 {
> > +				affinity = <&cpu_l0 &cpu_l1 &cpu_l2 &cpu_l3>;
> > +			};
> > +
> > +			ppi_cluster1: interrupt-partition-1 {
> > +				affinity = <&cpu_b0 &cpu_b1 &cpu_b2 &cpu_b3>;
> 
> The use of the word "cluster" is pretty misleading, specially as the
> actual CPU clusters don't align with this partitioning (you seem to
> have 2 independent A76 clusters). Consider using the word "partition",
> which was chosen exactly to avoid this confusion.

Ack.

Thanks for the review,

-- Sebastian
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