[PATCH v7 09/11] dt-bindings: power: rockchip: Convert to json-schema
Rob Herring
robh at kernel.org
Wed Apr 14 23:27:23 BST 2021
On Wed, Apr 14, 2021 at 11:18:54PM +0200, Johan Jonker wrote:
> From: Enric Balletbo i Serra <enric.balletbo at collabora.com>
>
> Convert the soc/rockchip/power_domain.txt binding document to
> json-schema and move to the power bindings directory.
>
> Signed-off-by: Enric Balletbo i Serra <enric.balletbo at collabora.com>
> Signed-off-by: Elaine Zhang <zhangqing at rock-chips.com>
> Signed-off-by: Johan Jonker <jbx6244 at gmail.com>
> ---
> Note for rob+dt:
> A tag was not added on purpose, because:
> Add "rockchip," prefix to the qos compatible name
> in example.
> Changed maintainers.
> Size reg description is reduced.
> Little style changes '' to ""
> Please have a look at it again.
>
> For some SoC nodes this patch serie generates notifications
> for undocumented "assigned-clocks" and "assigned-clock-parents"
> properties till there is consensus of what to do with it.
If the node has 'clocks', then you shouldn't get a warning now.
> ---
> Changed V7:
> Fix commit message and author format
> Changed SPDX-License-Identifier back to GPL-2.0
> Remove "clocks", "assigned-clocks" and "assigned-clock-parents"
> Fix indent example
> Changed V6:
> Changed author
> Changed V5:
> Change SPDX-License-Identifier to GPL-2.0-only OR BSD-2-Clause
> Remove a maintainer
> Changed patternProperties to power-domain
> Add "clocks", "assigned-clocks" and "assigned-clock-parents"
> Changed V4:
> Remove new compatible string
> Style changes '' to ""
> Changed V3:
> Use Enric's conversion with rk3399 example
> Changed V2:
> Convert power_domain.txt to YAML with rk3568 example
> ---
> .../bindings/power/rockchip,power-controller.yaml | 283 +++++++++++++++++++++
> .../bindings/soc/rockchip/power_domain.txt | 136 ----------
> 2 files changed, 283 insertions(+), 136 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/power/rockchip,power-controller.yaml
> delete mode 100644 Documentation/devicetree/bindings/soc/rockchip/power_domain.txt
>
> diff --git a/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml
> new file mode 100644
> index 000000000..934308006
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml
> @@ -0,0 +1,283 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Rockchip Power Domains
> +
> +maintainers:
> + - Elaine Zhang <zhangqing at rock-chips.com>
> + - Heiko Stuebner <heiko at sntech.de>
> +
> +description: |
> + Rockchip processors include support for multiple power domains which can be
> + powered up/down by software based on different application scenarios to save power.
> +
> + Power domains contained within power-controller node are generic power domain
> + providers documented in Documentation/devicetree/bindings/power/power-domain.yaml.
> +
> + IP cores belonging to a power domain should contain a "power-domains"
> + property that is a phandle for the power domain node representing the domain.
> +
> +properties:
> + $nodename:
> + const: power-controller
> +
> + compatible:
> + enum:
> + - rockchip,px30-power-controller
> + - rockchip,rk3036-power-controller
> + - rockchip,rk3066-power-controller
> + - rockchip,rk3128-power-controller
> + - rockchip,rk3188-power-controller
> + - rockchip,rk3228-power-controller
> + - rockchip,rk3288-power-controller
> + - rockchip,rk3328-power-controller
> + - rockchip,rk3366-power-controller
> + - rockchip,rk3368-power-controller
> + - rockchip,rk3399-power-controller
> +
> + "#power-domain-cells":
> + const: 1
> +
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 0
> +
> +patternProperties:
> + "^power-domain@[0-9a-f]+$":
> + type: object
> + description: |
> + Represents the power domains within the power controller node as documented
> + in Documentation/devicetree/bindings/power/power-domain.yaml.
> +
> + properties:
> +
> + "#power-domain-cells":
> + description:
> + Must be 0 for nodes representing a single PM domain and 1 for nodes
> + providing multiple PM domains.
> +
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 0
> +
> + reg:
> + maxItems: 1
> + description: |
> + Power domain index. Valid values are defined in
> + "include/dt-bindings/power/px30-power.h"
> + "include/dt-bindings/power/rk3036-power.h"
> + "include/dt-bindings/power/rk3066-power.h"
> + "include/dt-bindings/power/rk3128-power.h"
> + "include/dt-bindings/power/rk3188-power.h"
> + "include/dt-bindings/power/rk3228-power.h"
> + "include/dt-bindings/power/rk3288-power.h"
> + "include/dt-bindings/power/rk3328-power.h"
> + "include/dt-bindings/power/rk3366-power.h"
> + "include/dt-bindings/power/rk3368-power.h"
> + "include/dt-bindings/power/rk3399-power.h"
> +
> + clocks:
> + description: |
> + A number of phandles to clocks that need to be enabled while power domain
> + switches state.
I probably asked before, but can we have some max here?
> +
> + pm_qos:
Needs a type ref.
> + description: |
> + A number of phandles to qos blocks which need to be saved and restored
> + while power domain switches state.
> +
> + patternProperties:
> + "^power-domain@[0-9a-f]+$":
> + type: object
> + description: |
> + Represents a power domain child within a power domain parent node.
> +
> + properties:
> +
> + "#power-domain-cells":
> + description:
> + Must be 0 for nodes representing a single PM domain and 1 for nodes
> + providing multiple PM domains.
> +
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 0
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + description: |
> + A number of phandles to clocks that need to be enabled while power domain
> + switches state.
> +
> + pm_qos:
> + description: |
> + A number of phandles to qos blocks which need to be saved and restored
> + while power domain switches state.
> +
> + patternProperties:
> + "^power-domain@[0-9a-f]+$":
Create a '$defs' section an avoid the duplication.
> + type: object
> + description: |
> + Represents a power domain child within a power domain parent node.
> +
> + properties:
> +
> + "#power-domain-cells":
> + description:
> + Must be 0 for nodes representing a single PM domain and 1 for nodes
> + providing multiple PM domains.
> +
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 0
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + description: |
> + A number of phandles to clocks that need to be enabled while power domain
> + switches state.
> +
> + pm_qos:
> + description: |
> + A number of phandles to qos blocks which need to be saved and restored
> + while power domain switches state.
> +
> + required:
> + - reg
> +
> + additionalProperties: false
> +
> + required:
> + - reg
> +
> + additionalProperties: false
> +
> + required:
> + - reg
> +
> + additionalProperties: false
> +
> +required:
> + - compatible
> + - "#power-domain-cells"
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/rk3399-cru.h>
> + #include <dt-bindings/power/rk3399-power.h>
> +
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + qos_hdcp: qos at ffa90000 {
> + compatible = "rockchip,rk3399-qos", "syscon";
> + reg = <0x0 0xffa90000 0x0 0x20>;
> + };
> +
> + qos_iep: qos at ffa98000 {
> + compatible = "rockchip,rk3399-qos", "syscon";
> + reg = <0x0 0xffa98000 0x0 0x20>;
> + };
> +
> + qos_rga_r: qos at ffab0000 {
> + compatible = "rockchip,rk3399-qos", "syscon";
> + reg = <0x0 0xffab0000 0x0 0x20>;
> + };
> +
> + qos_rga_w: qos at ffab0080 {
> + compatible = "rockchip,rk3399-qos", "syscon";
> + reg = <0x0 0xffab0080 0x0 0x20>;
> + };
> +
> + qos_video_m0: qos at ffab8000 {
> + compatible = "rockchip,rk3399-qos", "syscon";
> + reg = <0x0 0xffab8000 0x0 0x20>;
> + };
> +
> + qos_video_m1_r: qos at ffac0000 {
> + compatible = "rockchip,rk3399-qos", "syscon";
> + reg = <0x0 0xffac0000 0x0 0x20>;
> + };
> +
> + qos_video_m1_w: qos at ffac0080 {
> + compatible = "rockchip,rk3399-qos", "syscon";
> + reg = <0x0 0xffac0080 0x0 0x20>;
> + };
> +
> + power-management at ff310000 {
> + compatible = "rockchip,rk3399-pmu", "syscon", "simple-mfd";
> + reg = <0x0 0xff310000 0x0 0x1000>;
> +
> + power-controller {
> + compatible = "rockchip,rk3399-power-controller";
> + #power-domain-cells = <1>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + /* These power domains are grouped by VD_CENTER */
> + power-domain at RK3399_PD_IEP {
> + reg = <RK3399_PD_IEP>;
> + clocks = <&cru ACLK_IEP>,
> + <&cru HCLK_IEP>;
> + pm_qos = <&qos_iep>;
> + #power-domain-cells = <0>;
> + };
> + power-domain at RK3399_PD_RGA {
> + reg = <RK3399_PD_RGA>;
> + clocks = <&cru ACLK_RGA>,
> + <&cru HCLK_RGA>;
> + pm_qos = <&qos_rga_r>,
> + <&qos_rga_w>;
> + #power-domain-cells = <0>;
> + };
> + power-domain at RK3399_PD_VCODEC {
> + reg = <RK3399_PD_VCODEC>;
> + clocks = <&cru ACLK_VCODEC>,
> + <&cru HCLK_VCODEC>;
> + pm_qos = <&qos_video_m0>;
> + #power-domain-cells = <0>;
> + };
> + power-domain at RK3399_PD_VDU {
> + reg = <RK3399_PD_VDU>;
> + clocks = <&cru ACLK_VDU>,
> + <&cru HCLK_VDU>;
> + pm_qos = <&qos_video_m1_r>,
> + <&qos_video_m1_w>;
> + #power-domain-cells = <0>;
> + };
> + power-domain at RK3399_PD_VIO {
> + reg = <RK3399_PD_VIO>;
> + #power-domain-cells = <1>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + power-domain at RK3399_PD_HDCP {
> + reg = <RK3399_PD_HDCP>;
> + clocks = <&cru ACLK_HDCP>,
> + <&cru HCLK_HDCP>,
> + <&cru PCLK_HDCP>;
> + pm_qos = <&qos_hdcp>;
> + #power-domain-cells = <0>;
> + };
> + };
> + };
> + };
> + };
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