[PATCH v2 2/3] Documentation: bindings: add DT documentation for u2phy and u2phy grf

[Rob Herring]

On Thu, Mar 02, 2017 at 03:49:04PM +0800, Meng Dongyang wrote:
> Due to the u2phy registers are separated from general grf, we need to
> add u2phy grf node and place u2phy node in it. So this patch add u2phy
> grf node.

Similar comment on the subject.

> 
> Changes in v2:
>  - add u2phy grf specification
> 
> Signed-off-by: Meng Dongyang <daniel.meng at rock-chips.com>
> ---
>  Documentation/devicetree/bindings/soc/rockchip/grf.txt | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.txt b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
> index 013e71a..6ac23f9 100644
> --- a/Documentation/devicetree/bindings/soc/rockchip/grf.txt
> +++ b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
> @@ -7,6 +7,9 @@ From RK3368 SoCs, the GRF is divided into two sections,
>  - GRF, used for general non-secure system,
>  - PMUGRF, used for always on system
>  
> +On RK3328 SoCs, the GRF is divided into three sections,
> +except GRF and PMUGRF, add a section for USB2PHYGRF,
> +
>  Required Properties:
>  
>  - compatible: GRF should be one of the followings
> @@ -19,6 +22,8 @@ Required Properties:
>  - compatible: PMUGRF should be one of the followings
>     - "rockchip,rk3368-pmugrf", "syscon": for rk3368
>     - "rockchip,rk3399-pmugrf", "syscon": for rk3399
> +- compatible: USB2GRF should be one of the followings
> +   - "rockchip,rk3328-usb2phy-grf", "syscon": for rk3328
>  - reg: physical base address of the controller and length of memory mapped
>    region.
>  
> @@ -33,3 +38,13 @@ Example: GRF and PMUGRF of RK3399 SoCs
>  		compatible = "rockchip,rk3399-grf", "syscon";
>  		reg = <0x0 0xff770000 0x0 0x10000>;
>  	};
> +
> +Example: USB2GRF of RK3328 SoCs
> +
> +	usb2phy_grf: syscon at ff450000 {
> +		compatible = "rockchip,rk3328-usb2phy-grf", "syscon",
> +			     "simple-mfd";

simple-mfd is not documented. Do you have child nodes?

What makes this a syscon? It has non-PHY registers?


> +		reg = <0x0 0xff450000 0x0 0x10000>;
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +	};
> -- 
> 1.9.1
> 
>