[RESEND PATCH v2 2/4] mmc: core: changes frequency to hs_max_dtr when selecting hs400es

Doug Anderson dianders at google.com
Thu Sep 29 12:47:37 PDT 2016


On Thu, Sep 22, 2016 at 5:12 PM, Shawn Lin <shawn.lin at rock-chips.com> wrote:
> Per JESD84-B51 P69, Host need to change frequency to <=52MHz

Technically Page 49.  In the PDF you go to page 69, but the heading on
the top of the page says 49.

> after setting HS_TIMING to 0x1, and host may changes frequency
> to <= 200MHz after setting HS_TIMING to 0x3. That means the card
> expects the clock rate to increase from the current used f_init
> (which is less than 400KHz, but still being less than 52MHz) to
> 52MHz, otherwise we find some eMMC devices significantly report
> failure when sending status.

Technically it seems like things ought to be OK at the slow speed
since technically we're allowed to talk "high speed" at 400 kHZ (or at
any rate <= 52MHz).  ...but I guess I could also see some cards not
liking that.  Though I'm no expert, feel free to add my reviewed-by if
it is useful:

Reviewed-by: Douglas Anderson <dianders at chromium.org>

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