[PATCH v2 2/2] ARM: dts: rockchip: initialize rk3066 PLL clock rate

[Paweł Jarosz]

Initialize PLL, cpu bus and peripherial bus rate while kernel init.
No other module does than.

This gives us performance boost observable for example in mmc transfers.

Signed-off-by: Paweł Jarosz <paweljarosz3691 at gmail.com>
---

Changes in v2:
- added peripherial and cpu bus
- removed PLL_DPLL, PLL_APLL

 arch/arm/boot/dts/rk3066a.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
index 0d0dae3..29dd434 100644
--- a/arch/arm/boot/dts/rk3066a.dtsi
+++ b/arch/arm/boot/dts/rk3066a.dtsi
@@ -151,6 +151,15 @@
 
 		#clock-cells = <1>;
 		#reset-cells = <1>;
+		assigned-clocks = <&cru PLL_CPLL>, <&cru PLL_GPLL>,
+				  <&cru ACLK_CPU>, <&cru HCLK_CPU>,
+				  <&cru PCLK_CPU>, <&cru ACLK_PERI>,
+				  <&cru HCLK_PERI>, <&cru PCLK_PERI>;
+
+		assigned-clock-rates = <400000000>, <594000000>,
+				       <300000000>, <150000000>,
+				       <75000000>, <300000000>,
+				       <150000000>, <75000000>;
 	};
 
 	timer at 2000e000 {
-- 
2.7.4