[PATCH 3/3] PCI: rockchip: Add system PM support

Brian Norris briannorris at chromium.org
Tue Nov 22 20:56:58 PST 2016

On Wed, Nov 23, 2016 at 10:51:50AM +0800, Shawn Lin wrote:
> 在 2016/11/23 10:45, Brian Norris 写道:
> >I'm not sure if that's necessary. I was just curious on how this got
> >determined, when it seemed that 500ms was plenty.
> >
> Refer to https://lists.launchpad.net/kernel-packages/msg123315.html
> "When the host (Linux/Driver) sends the PME_TURN_OFF message it should
> wait for PME_TO_ACK from the device. Microsoft Windows versions
> typically wait for 5 seconds."
> This is the reason for why I added 5s for timeout.

Huh, good find. Seems like something that could go in either the commit
message or the comments.

FWIW, that bug report seems to also be related to the question at hand
-- how to handle L2 link state entry. That bug notes that Linux "doesn't
wait for PME_TO_ACK from the device", but AFAICT, Linux PCI drivers
don't typically send PME_TURN_OFF at all.

So right now, we're just relying on our platform suspend code like this.
It'd be interesting to know if other root complexes had programmable
Message Request support like this available to the host CPU, or if they
all have something hardcoded into their BIOS/ACPI support or something
(or just don't use PME_TURN_OFF at all).

Anyway, I guess that's just a future-work question, in case we want to
consolidate support like this into the PCI core framework.


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