[PATCH v4 2/2] phy: rockchip-inno-usb2: correct 480MHz output clock stable time
wulf at rock-chips.com
Mon Nov 14 19:54:07 PST 2016
We found that the system crashed due to 480MHz output clock of
USB2 PHY was unstable after clock had been enabled by gpu module.
Theoretically, 1 millisecond is a critical value for 480MHz
output clock stable time, so we try to change the delay time
to 1.2 millisecond to avoid this issue.
And the commit ed907fb1d7c3 ("phy: rockchip-inno-usb2: correct
clk_ops callback") used prepare callbacks instead of enable
callbacks to support gate a clk if the operation may sleep. So
we can switch from delay to sleep functions.
Also fix a spelling error from "waitting" to "waiting".
Signed-off-by: William Wu <wulf at rock-chips.com>
Reviewed-by: Douglas Anderson <dianders at chromium.org>
Changes in v4:
- add Reviewed-by and fix a spelling error
Changes in v3:
Changes in v2:
drivers/phy/phy-rockchip-inno-usb2.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 365e077..5d922fc 100644
@@ -165,8 +165,8 @@ static int rockchip_usb2phy_clk480m_prepare(struct clk_hw *hw)
- /* waitting for the clk become stable */
+ /* waiting for the clk become stable */
+ usleep_range(1200, 1300);
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