[RFC PATCH v1 2/4] drm: rockchip: add RGA driver support

[Yakir Yang]

Hi Rob,

+ rockchip / dri email list back

On 03/23/2016 10:20 PM, Rob Herring wrote:
> On Mon, Mar 21, 2016 at 05:40:06PM +0800, Yakir Yang wrote:
>> Rockchip RGA is a separate 2D raster graphic acceleration unit. It
>> accelerates 2D graphics operations, such as point/line drawing, image
>> scaling, rotation, BitBLT, alpha blending and image blur/sharpness.
>>
>> The RGA driver is based on Exynos G2D driver, it is performed by two
>> tasks simply.
>> 1. Configures the rendering parameters, such as foreground color and
>>     coordinates data by setting the drawing context registers.
>> 2. Start the rendering process by calling rga_exec() ioctl.
>>
>> The RGA supports DMA mode as host interface. User can make command list
>> to reduce HOST(ARM) loads. The contents of The command list is setted to
>> relevant registers of RGA by DMA.
>>
>> The command list is composed Header and command sets and Tail.
>> - Header: The number of command set(4Bytes)
>> - Command set: Register offset(4Bytes) + Register data(4Bytes)
>> - Tail: Pointer of base address of the other command list(4Bytes)
>>
>> By Tail field, the G2D can process many command lists without halt at
>> one go.
>>
>> The G2D has following the rendering pipeline.
>>                 --->     Color Fill     --->
>>                 |                          |
>> --> DMA (read) ---> Src Bitmap Process ----> Alpha/ROP ---> Format convert ---> DMA (Write)
>>                 |                          |
>>                 ---> Dst Bitmap Process --->
>>
>> And supports various operations from the rendering pipeline.
>> - copy
>> - fast solid color fill
>> - rotation
>> - flip
>> - 4 operand raster operation(ROP4)
>> - alpha blending
>> - color key
>> - dithering
>> - etc
>>
>> User should make the command list to data and registers needed by
>> operation to use. The Rockchip RGA driver only manages the command lists
>> received from user. Some registers needs memory base address(physical
>> address) of image. User doesn't know its physical address, so fills the
>> gem handle of that memory than address to command sets, then RGA driver
>> converts it to memory base address.
>>
>> We adds three ioctls for Rockchip RGA.
>>
>> - ioctls
>> DRM_ROCKCHIP_RGA_GET_VER: get the RGA hardware version
>> DRM_ROCKCHIP_RGA_SET_CMDLIST: set the command list from user to driver
>> DRM_ROCKCHIP_RGA_EXEC: execute the command lists setted to driver
>>
>> Signed-off-by: Yakir Yang <ykk at rock-chips.com>
>> ---
>>   .../bindings/display/rockchip/rockchip-rga.txt     |  36 +
>>   drivers/gpu/drm/rockchip/Kconfig                   |   9 +
>>   drivers/gpu/drm/rockchip/Makefile                  |   1 +
>>   drivers/gpu/drm/rockchip/rockchip_drm_drv.c        |  35 +-
>>   drivers/gpu/drm/rockchip/rockchip_drm_drv.h        |   4 +
>>   drivers/gpu/drm/rockchip/rockchip_drm_rga.c        | 977 +++++++++++++++++++++
>>   drivers/gpu/drm/rockchip/rockchip_drm_rga.h        | 108 +++
>>   include/uapi/drm/rockchip_drm.h                    |  63 ++
>>   8 files changed, 1232 insertions(+), 1 deletion(-)
>>   create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip-rga.txt
>>   create mode 100644 drivers/gpu/drm/rockchip/rockchip_drm_rga.c
>>   create mode 100644 drivers/gpu/drm/rockchip/rockchip_drm_rga.h
>>   create mode 100644 include/uapi/drm/rockchip_drm.h
>>
>> diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-rga.txt b/Documentation/devicetree/bindings/display/rockchip/rockchip-rga.txt
>> new file mode 100644
>> index 0000000..0c606cb
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip-rga.txt
>> @@ -0,0 +1,36 @@
>> +device-tree bindings for rockchip 2D raster graphic acceleration controller (RGA)
> s/rockchip/RockChip/
Done
>> +
>> +RGA is a separate 2D raster graphic acceleration unit. It accelerates 2D
>> +graphics operations, such as point/line drawing, image scaling, rotation,
>> +BitBLT, alpha blending and image blur/sharpness.
>> +
>> +Required properties:
>> +- compatible: value should be one of the following
>> +		"rockchip,rk3228-rga";
>> +		"rockchip,rk3288-rga";
>> +		"rockchip,rk3399-rga";
>> +
>> +- interrupts: RGA interrupt number.
>> +
>> +- clocks: phandle to RGA sclk/hclk/aclk clocks
>> +
>> +- clock-names: should be "aclk" "hclk" and "sclk"
> comma                             ^
>
> You have different orders for clocks and clock-names. Please be clear
> what the order is.
>
Okay
>> +
>> +- resets: Must contain an entry for each entry in reset-names.
>> +  See ../reset/reset.txt for details.
>> +- reset-names: should be "aclk" "hclk" and "sclk"
> Same as clocks?
I should rename them to "core", "axi" and "ahb"
>> +
>> +Example:
>> +SoC specific DT entry:
>> +	rga: rga at ff680000 {
> gpu at ... to be generic
Done
>> +		compatible = "rockchip,rk3399-rga";
>> +		reg = <0xff680000 0x10000>;
>> +		interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
>> +		interrupt-names = "rga";
> Not documented. interrupt-names is pointless for single irq, so just
> drop it.
Okay
>> +		clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA>;
>> +		clock-names = "aclk", "hclk", "sclk";
>> +
>> +		resets = <&cru SRST_A_RGA>, <&cru SRST_H_RGA>, <&cru SRST_RGA_CORE>;
>> +		reset-names = "aclk", "hclk", "sclk";
>> +		status = "disabled";
>> +	};
>
>