[PATCH v7 3/5] usb: dwc3: make usb2 phy utmi interface configurable in DT
Heiko Stübner
heiko at sntech.de
Sun Jul 17 03:28:22 PDT 2016
Am Samstag, 16. Juli 2016, 17:57:15 schrieb Rob Herring:
> On Thu, Jul 14, 2016 at 04:59:20PM +0800, William Wu wrote:
> > Add snps,phyif-utmi-width devicetree property to configure
> > the UTMI+ PHY with an 8- or 16-bit interface. UTMI+ PHY
> > interface is a hardware property, and it's platform dependent.
> > Normally,the PHYIF can be configured during coreconsultant.
>
> ^
> space
>
> > But for some specific USB cores(e.g. rk3399 SoC DWC3), the
> > default PHYIF configuration value is fault, so we need to
> > reconfigure it by software.
> >
> > And refer to the DWC3 databook, the GUSB2PHYCFG.USBTRDTIM
> > must be set to the corresponding value according to the
> > UTMI+ PHY interface.
> >
> > Signed-off-by: William Wu <william.wu at rock-chips.com>
> > ---
> > Changes in v7:
> > - remove quirk and use only one property to configure utmi (Heiko, Rob
> > Herring)
> >
> > Changes in v6:
> > - use '-' instead of '_' in dts (Rob Herring)
> >
> > Changes in v5:
> > - None
> >
> > Changes in v4:
> > - rebase on top of balbi testing/next, remove pdata (balbi)
> >
> > Changes in v3:
> > - None
> >
> > Changes in v2:
> > - add a quirk for phyif_utmi (balbi)
> >
> > Documentation/devicetree/bindings/usb/dwc3.txt | 3 +++
> > drivers/usb/dwc3/core.c | 25
> > +++++++++++++++++++++++++ drivers/usb/dwc3/core.h
> > | 10 ++++++++++
> > 3 files changed, 38 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt
> > b/Documentation/devicetree/bindings/usb/dwc3.txt index 020b0e9..00cc541
> > 100644
> > --- a/Documentation/devicetree/bindings/usb/dwc3.txt
> > +++ b/Documentation/devicetree/bindings/usb/dwc3.txt
> >
> > @@ -47,6 +47,9 @@ Optional properties:
> > - snps,hird-threshold: HIRD threshold
> > - snps,hsphy_interface: High-Speed PHY interface selection between
> > "utmi" for>
> > UTMI+ and "ulpi" for ULPI when the DWC_USB3_HSPHY_INTERFACE has value
> > 3.
> >
> > + - snps,phyif-utmi-width: the value to configure the core to support a
> > UTMI+ PHY + with an 8- or 16-bit interface. Value 8 select 8-bit
> > + interface, value 16 select 16-bit interface.
>
> Is 'phy_type = "utmi_wide"' not the same as 16-bit width?
>
> Again, I think this should be common.
after knowing that I need to look for that "utmi_wide", I think I'd agree.
I found mention of that in usb/ci-hdrc-usb2.txt and usb/fsl-usb.txt and from
the coresponding code, I can see that they really mean the 16bit interface,
the Rockchip TRM as well as the spec [0] seems to call it UTMI+ but really
looks the same as utmi_wide.
Interestingly, there is already generic code in drivers/usb/phy/of.c so that
property should probably move to devicetree/bindings/usb/generic.txt
as well.
Heiko
[0] http://cache.nxp.com/files/corporate/doc/support_info/UTMI-PLUS-SPECIFICATION.pdf
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