[PATCH v3 7/7] clk: rockchip: rk3399: Add support frac mode frequencies
heiko at sntech.de
Thu Aug 4 12:19:08 PDT 2016
Am Dienstag, 2. August 2016, 15:22:59 schrieb Xing Zheng:
> We need to support various display resolutions for external
> display devices like HDMI/DP, the frac mode can help us to
> acquire almost any frequencies, and need higher VCOs to reduce
> clock jitters.
> Signed-off-by: Xing Zheng <zhengxing at rock-chips.com>
why does this need to be a separate rate array and cannot live in the general
pll rate array?
The plls are general purpose, so we shouldn't limit them arbitarily.
I currently only see some frequencies (594MHz, 297MHz, 54MHz) that are present
in both arrays but have different settings. As your patch description says
that these settings reduce clock jitter, wouldn't the general frequencies also
profit from merging these new values into the general rate array?
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