[PATCH v2 2/7] clk: rockchip: fix rk3288 pll status register location
dianders at chromium.org
Fri Sep 12 16:46:36 PDT 2014
On Fri, Sep 12, 2014 at 3:30 PM, Heiko Stuebner <heiko at sntech.de> wrote:
> From: Jianqun <jay.xu at rock-chips.com>
> In RK3288, APLL lock status bit is in GRF_SOC_STATUS1,
> but in RK3188, is GRFSOC_STATUS0.
> Signed-off-by: Jianqun <jay.xu at rock-chips.com>
> Also name the constant accordingly as GRF_SOC_STATUS1
> to prevent confusion.
> Signed-off-by: Heiko Stuebner <heiko at sntech.de>
> drivers/clk/rockchip/clk-rk3288.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Doug Anderson <dianders at chromium.org>
Tested-by: Doug Anderson <dianders at chromium.org>
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