[PATCH] clk: rockchip: fix rk3288 cpuclk core dividers
dianders at chromium.org
Thu Dec 18 14:16:49 PST 2014
On Thu, Dec 18, 2014 at 11:22 AM, Heiko Stübner <heiko at sntech.de> wrote:
> Commit 0e5bdb3f9fa5 (clk: rockchip: switch to using the new cpuclk type
> for armclk) didn't take into account that the divider used on rk3288
> are of the (n+1) type.
> The rk3066 and rk3188 socs use more complex divider types making it
> necessary for the list-elements to be the real register-values to write.
> Therefore reduce divider values in the table accordingly so that they
> really are the values that should be written to the registers.
> Reported-by: Sonny Rao <sonnyrao at chromium.org>
> Fixes: 0e5bdb3f9fa5
> Signed-off-by: Heiko Stuebner <heiko at sntech.de>
> Cc: stable at vger.kernel.org
> drivers/clk/rockchip/clk-rk3288.c | 28 ++++++++++++++--------------
> 1 file changed, 14 insertions(+), 14 deletions(-)
Looks right to me:
Reviewed-by: Doug Anderson <dianders at chromium.org>
I've done basic testing on this and saw no problems, but I haven't
done stress testing yet...
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