[PATCH v3 2/3] riscv: word-at-a-time: improve find_zero() without Zbb

[Nam Cao]

Jisheng Zhang <jszhang at kernel.org> writes:
> Previous commit improved the find_zero() performance for !RISCV_ISA_ZBB.
> What about RISCV_ISA_ZBB=y but the HW doesn't support Zbb? We have the
> same heavy generic fls64() issue.

This patch separation makes sense in your first version. Now it makes
more sense to squash this part to the first patch.

...
> To remove non-necessary zero bits couting on RV32, we also replace the
> 'fls64(mask) >> 3' with '!mask ? 0 : ((__fls(mask) + 1) >> 3);'

This should be its own patch.

Nam