[PATCH] riscv-v: Decouple the NR_CPUS from RISCV_SBI_V01

Yicong Yang yang.yicong at picoheart.com
Thu Oct 22 21:11:15 PDT 2026


Currently the NR_CPUS configuration is highly coupled with
RISCV_SBI_V01 as SBI v0.1 has a limitation on the maximum
support hartid. This doesn't make sense as enable
RISCV_SBI_V01 only enable the build of related functions
but the platform could use a higher SBI version which
doesn't even have v0.1 function, or have v0.1 functions
that doesn't use hartid e.g. SBI console. Add this doesn't
solve the problem for out-of-range hartid as NR_CPUS only
restrict the maximum CPU number kernel can support but
not the maximum hartid, see __sbi_v01_cpumask_to_hartmask().

Disable RISCV_SBI_V01 for larger NR_CPUS is not reasonable
as platform may choose to use certain v0.1 function e.g.
SBI console, but not others.

Break the tie between NR_CPUS and RISCV_SBI_V01 to allow
>64 NR_CPUS along with SBI v0.1 build for high end server.

Signed-off-by: Yicong Yang <yang.yicong at picoheart.com>
---
 arch/riscv/Kconfig | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 5874ca30f4f6..d02b70ffde48 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -453,10 +453,8 @@ config SMP
 config NR_CPUS
 	int "Maximum number of CPUs (2-512)"
 	depends on SMP
-	range 2 512 if !RISCV_SBI_V01 && 64BIT
-	range 2 128 if !RISCV_SBI_V01 && 32BIT
-	range 2 64 if RISCV_SBI_V01 && 64BIT
-	range 2 32 if RISCV_SBI_V01 && 32BIT
+	range 2 512 if 64BIT
+	range 2 128 if 32BIT
 	default "32" if 32BIT
 	default "64" if RISCV_SBI_V01 && 64BIT
 	default "256" if !RISCV_SBI_V01 && 64BIT
-- 
2.54.0 (Apple Git-157)



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