[PATCH 2/2] riscv: dts: spacemit: k3: Initial support for CoM260-IFX board
Yixun Lan
dlan at kernel.org
Tue May 19 22:40:10 PDT 2026
The K3 CoM260-IFX board combine with one 260 pins "Gold Finger" computer
module with a carrier board. The module integrates the K3 SoC, LPDDR5,
UFS storage, Gigabit Ethernet, Micro SD card, PMIC Chip. The board offers
a comprehensive array of interfaces, including MIPI-DSI, MIPI-CSI,
DisplayPort, SDIO, SPI, I2S, I2C, CAN-FD, PWM, UART, USB, PCIe, and GMAC.
Add initial support for enabling Serial UART and ethernet.
Signed-off-by: Yixun Lan <dlan at kernel.org>
---
arch/riscv/boot/dts/spacemit/Makefile | 1 +
arch/riscv/boot/dts/spacemit/k3-com260-ifx.dts | 21 +++
arch/riscv/boot/dts/spacemit/k3-com260.dtsi | 190 +++++++++++++++++++++++++
arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi | 33 +++++
4 files changed, 245 insertions(+)
diff --git a/arch/riscv/boot/dts/spacemit/Makefile b/arch/riscv/boot/dts/spacemit/Makefile
index acb993c452ba..28ec9e1e0a62 100644
--- a/arch/riscv/boot/dts/spacemit/Makefile
+++ b/arch/riscv/boot/dts/spacemit/Makefile
@@ -4,5 +4,6 @@ dtb-$(CONFIG_ARCH_SPACEMIT) += k1-milkv-jupiter.dtb
dtb-$(CONFIG_ARCH_SPACEMIT) += k1-musepi-pro.dtb
dtb-$(CONFIG_ARCH_SPACEMIT) += k1-orangepi-r2s.dtb
dtb-$(CONFIG_ARCH_SPACEMIT) += k1-orangepi-rv2.dtb
+dtb-$(CONFIG_ARCH_SPACEMIT) += k3-com260-ifx.dtb
dtb-$(CONFIG_ARCH_SPACEMIT) += k3-deepcomputing-fml13v05.dtb
dtb-$(CONFIG_ARCH_SPACEMIT) += k3-pico-itx.dtb
diff --git a/arch/riscv/boot/dts/spacemit/k3-com260-ifx.dts b/arch/riscv/boot/dts/spacemit/k3-com260-ifx.dts
new file mode 100644
index 000000000000..238bb03d0e9e
--- /dev/null
+++ b/arch/riscv/boot/dts/spacemit/k3-com260-ifx.dts
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (c) 2026 SpacemiT (Hangzhou) Technology Co. Ltd
+ * Copyright (c) 2026 Yixun Lan <dlan at kernel.org>
+ */
+
+#include "k3-com260.dtsi"
+
+/ {
+ model = "SpacemiT K3 CoM260 IFX";
+ compatible = "spacemit,k3-com260-ifx", "spacemit,k3-com260", "spacemit,k3";
+
+ aliases {
+ serial0 = &uart0;
+ ethernet0 = ð1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
diff --git a/arch/riscv/boot/dts/spacemit/k3-com260.dtsi b/arch/riscv/boot/dts/spacemit/k3-com260.dtsi
new file mode 100644
index 000000000000..1801a44d4355
--- /dev/null
+++ b/arch/riscv/boot/dts/spacemit/k3-com260.dtsi
@@ -0,0 +1,190 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (c) 2026 SpacemiT (Hangzhou) Technology Co. Ltd
+ * Copyright (c) 2026 Yixun Lan <dlan at kernel.org>
+ */
+#include <dt-bindings/gpio/gpio.h>
+
+#include "k3.dtsi"
+#include "k3-pinctrl.dtsi"
+
+/ {
+ model = "SpacemiT K3 CoM260 Module";
+ compatible = "spacemit,k3-com260", "spacemit,k3";
+
+ memory at 100000000 {
+ device_type = "memory";
+ reg = <0x1 0x00000000 0x4 0x00000000>;
+ };
+
+ reg_5v_sys: regulator-5v-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "P5V0_SYS";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+};
+
+&i2c8 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c8_cfg>;
+ status = "okay";
+
+ p1 at 41 {
+ compatible = "spacemit,p1";
+ reg = <0x41>;
+ interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
+ vin1-supply = <®_5v_sys>;
+ vin2-supply = <®_5v_sys>;
+ vin3-supply = <®_5v_sys>;
+ vin4-supply = <®_5v_sys>;
+ vin5-supply = <®_5v_sys>;
+ vin6-supply = <®_5v_sys>;
+ aldoin-supply = <®_5v_sys>;
+ dldoin1-supply = <&buck4>;
+ dldoin2-supply = <&buck4>;
+
+ regulators {
+ buck1: buck1 {
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1050000>;
+ regulator-ramp-delay = <5000>;
+ regulator-always-on;
+ };
+
+ buck2: buck2 {
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1050000>;
+ regulator-ramp-delay = <5000>;
+ regulator-always-on;
+ };
+
+ buck3: buck3 {
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <800000>;
+ regulator-ramp-delay = <5000>;
+ regulator-always-on;
+ };
+
+ buck4: buck4 {
+ regulator-min-microvolt = <2100000>;
+ regulator-max-microvolt = <2100000>;
+ regulator-ramp-delay = <5000>;
+ regulator-always-on;
+ };
+
+ buck5: buck5 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-ramp-delay = <5000>;
+ regulator-always-on;
+ };
+
+ buck6: buck6 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <500000>;
+ regulator-ramp-delay = <5000>;
+ regulator-always-on;
+ };
+
+ aldo1: aldo1 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ aldo2: aldo2 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ aldo3: aldo3 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3400000>;
+ };
+
+ aldo4: aldo4 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ dldo1: dldo1 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ dldo2: dldo2 {
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ dldo3: dldo3 {
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ dldo4: dldo4 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ };
+
+ dldo5: dldo5 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ dldo6: dldo6 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ dldo7: dldo7 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+ };
+ };
+};
+
+ð1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac1_rgmii_0_cfg>, <&gmac1_phy_0_cfg>;
+ phy-mode = "rgmii-id";
+ phy-handle = <&phy1>;
+ status = "okay";
+
+ mdio {
+ phy1: phy at 1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ reset-gpios = <&gpio 1 5 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <10000>;
+ reset-deassert-us = <10000>;
+ };
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_0_cfg>;
+ status = "okay";
+};
diff --git a/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi
index 23899d3f308a..04efe64b8a3a 100644
--- a/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi
+++ b/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi
@@ -45,6 +45,39 @@ gmac0-phy-0-pins {
};
};
+ gmac1_rgmii_0_cfg: gmac1-rgmii-0-cfg {
+ gmac1_base_pins: gmac1-0-pins {
+ pinmux = <K3_PADCONF(21, 1)>, /* gmac1_rxdv */
+ <K3_PADCONF(22, 1)>, /* gmac1 rx d0 */
+ <K3_PADCONF(23, 1)>, /* gmac1 rx d1 */
+ <K3_PADCONF(24, 1)>, /* gmac1 rx_clk */
+ <K3_PADCONF(25, 1)>, /* gmac1 rx d2 */
+ <K3_PADCONF(26, 1)>, /* gmac1 rx d3 */
+ <K3_PADCONF(27, 1)>, /* gmac1 tx d0 */
+ <K3_PADCONF(28, 1)>, /* gmac1 tx d1 */
+ <K3_PADCONF(29, 1)>, /* gmac1 tx clk */
+ <K3_PADCONF(30, 1)>, /* gmac1 tx d2 */
+ <K3_PADCONF(31, 1)>, /* gmac1 tx d3 */
+ <K3_PADCONF(32, 1)>, /* gmac1 tx_en */
+ <K3_PADCONF(33, 1)>, /* gmac1 mdc */
+ <K3_PADCONF(34, 1)>; /* gmac1 mdio */
+
+ bias-disable;
+ drive-strength = <25>;
+ power-source = <1800>;
+ };
+ };
+
+ gmac1_phy_0_cfg: gmac1-phy-0-cfg {
+ gmac1-phy-0-pins {
+ pinmux = <K3_PADCONF(35, 1)>; /* gmac1 int */
+
+ bias-disable;
+ drive-strength = <25>;
+ power-source = <1800>;
+ };
+ };
+
/omit-if-no-ref/
i2c8_cfg: i2c8-cfg {
i2c8-pins {
--
2.54.0
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