[PATCH v5 3/3] riscv: dts: spacemit: Add thermal sensor for K1 SoC

[Yixun Lan]

Hi Shuwei,

On 10:41 Tue 19 May     , Shuwei Wu wrote:
> Hi Yixun,
> 
> On Tue May 19, 2026 at 8:26 AM CST, Yixun Lan wrote:
> > Hi Shuwei,
> >
> > On 15:15 Mon 27 Apr     , Shuwei Wu wrote:
> >> Include the Thermal Sensor node in the SpacemiT K1 dtsi
> >> with definitions for registers, clocks, and interrupts.
> >> Additionally, configure thermal zones for the soc, package, gpu, and
> >> clusters to enable temperature monitoring via the thermal framework.
> >> 
> >> Tested-by: Vincent Legoll <legoll at online.fr> # OrangePi-RV2
> >> Tested-by: Gong Shuai <gsh517025 at gmail.com>
> >> Signed-off-by: Shuwei Wu <shuwei.wu at mailbox.org>
> >> 
> >> ---
> >> Changes in v2:
> >> - Update compatible to "spacemit,k1-tsensor"
> >> ---
> >>  arch/riscv/boot/dts/spacemit/k1.dtsi | 101 +++++++++++++++++++++++++++++++++++
> >>  1 file changed, 101 insertions(+)
> >> 
> >> diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi
> >> index 529ec68e9c23..e9952204224e 100644
> >> --- a/arch/riscv/boot/dts/spacemit/k1.dtsi
> >> +++ b/arch/riscv/boot/dts/spacemit/k1.dtsi
> >> @@ -339,6 +339,96 @@ osc_32k: clock-32k {
> >>  		};
> >>  	};
> >>  
> >> +	thermal-zones {
> >> +		soc-thermal {
> >> +			polling-delay-passive = <0>;
> >> +			polling-delay = <0>;
> >> +			thermal-sensors = <&thermal 0>;
> >> +
> >> +			trips {
> >> +				soc-crit {
> >> +					temperature = <115000>;
> >> +					hysteresis = <0>;
> >> +					type = "critical";
> >> +				};
> >> +			};
> >> +		};
> >> +
> >> +		package-thermal {
> >> +			polling-delay-passive = <0>;
> >> +			polling-delay = <0>;
> >> +			thermal-sensors = <&thermal 1>;
> >> +
> >> +			trips {
> >> +				package-crit {
> >> +					temperature = <115000>;
> >> +					hysteresis = <0>;
> >> +					type = "critical";
> >> +				};
> >> +			};
> >> +		};
> >> +
> >> +		gpu-thermal {
> >> +			polling-delay-passive = <100>;
> >> +			polling-delay = <0>;
> >> +			thermal-sensors = <&thermal 2>;
> >> +
> >> +			trips {
> >> +				gpu-alert {
> >> +					temperature = <85000>;
> >> +					hysteresis = <2000>;
> >> +					type = "passive";
> >> +				};
> >> +
> >> +				gpu-crit {
> >> +					temperature = <115000>;
> >> +					hysteresis = <0>;
> >> +					type = "critical";
> >> +				};
> >> +			};
> >> +		};
> >> +
> >> +		cluster0-thermal {
> >> +			polling-delay-passive = <100>;
> >> +			polling-delay = <0>;
> >> +			thermal-sensors = <&thermal 3>;
> >> +
> >> +			trips {
> >> +				cluster0-alert {
> >> +					temperature = <85000>;
> >> +					hysteresis = <2000>;
> >> +					type = "passive";
> >> +				};
> >> +
> >> +				cluster0-crit {
> >> +					temperature = <115000>;
> >> +					hysteresis = <0>;
> >> +					type = "critical";
> >> +				};
> >> +			};
> >> +		};
> >> +
> >> +		cluster1-thermal {
> >> +			polling-delay-passive = <100>;
> >> +			polling-delay = <0>;
> >> +			thermal-sensors = <&thermal 4>;
> >> +
> >> +			trips {
> >> +				cluster1-alert {
> >> +					temperature = <85000>;
> >> +					hysteresis = <2000>;
> >> +					type = "passive";
> >> +				};
> >> +
> >> +				cluster1-crit {
> >> +					temperature = <115000>;
> >> +					hysteresis = <0>;
> >> +					type = "critical";
> >> +				};
> >> +			};
> >> +		};
> >> +	};
> >> +
> >>  	soc {
> >>  		compatible = "simple-bus";
> >>  		interrupt-parent = <&plic>;
> >> @@ -494,6 +584,17 @@ syscon_apbc: system-controller at d4015000 {
> >>  			#reset-cells = <1>;
> >>  		};
> >>  
> >> +		thermal: thermal at d4018000 {
> >> +			compatible = "spacemit,k1-tsensor";
> >> +			reg = <0x0 0xd4018000 0x0 0x100>;
> >> +			clocks = <&syscon_apbc CLK_TSEN>,
> >> +				 <&syscon_apbc CLK_TSEN_BUS>;
> >> +			clock-names = "core", "bus";
> >> +			interrupts = <61>;
> >> +			resets = <&syscon_apbc RESET_TSEN>;
> >> +			#thermal-sensor-cells = <1>;
> >> +		};
> > Ok, so if I understand correctly the thermal is a SoC feature, so with
> > above it will be enabled by default for all boards, but for the convention
> > we usually disable it in dtsi file, and enable it at board dts level
> >
> > Please convince me doing above is better? as I'm not sure if there is
> > cases that user want it disabled (but could possible)..
> 
> I had two reasons for keeping the thermal node enabled in k1.dtsi,
> rather than requiring each board to opt in:
> 
> 1. Other SoCs follow the same pattern: the RISC-V JH7110 and Allwinner D1s
> both define their thermal sensor nodes and thermal-zones in the SoC dtsi
> without status = "disabled".
> 
> 2. Thermal protection is safety-critical, and the silicon trip points
> don't vary between boards. Leaving it disabled by default risks boards
> booting without thermal shutdown.
> 
Ok, sounds good to me, I will queue it unless objection from others

Reviewed-by: Yixun Lan <dlan at kernel.org>

-- 
Yixun Lan (dlan)