[PATCH v2 02/12] dt-bindings: clock: Add system-0 domain PLL clock

[Changhuang Liang]

Hi, Krzysztof

Thanks for the review.

> On 12/05/2026 10:35, Changhuang Liang wrote:
> > Add system-0 domain PLL clock for StarFive JHB100 SoC.
> >
> > Signed-off-by: Changhuang Liang <changhuang.liang at starfivetech.com>
> > ---
> >  include/dt-bindings/clock/starfive,jhb100-crg.h | 6 ++++++
> >  1 file changed, 6 insertions(+)
> 
> 
> Why isn't this added with the binding for this device?

Does that mean directly squashing patches 2, 4, 6, and 8 into patch 1?

Best Regards,
Changhuang