[PATCH 1/2] iommu/riscv: Map IMSIC addresses for paging domains

[Tomasz Jeznach]

Hi,

On Fri, May 8, 2026 at 2:23 PM Andrew Jones
<andrew.jones at oss.qualcomm.com> wrote:
>
> When IOMMU_DMA is enabled, devices get paging domains and MSI writes
> to IMSIC interrupt files must be handled correctly in the s-stage.
> As the device always writes to the host physical IMSIC addresses,
> which the IMSIC irqchip programs directly, install s-stage identity
> mappings for the host IMSICs. But, use IOMMU_RESV_DIRECT_RELAXABLE
> since the 1:1 mappings aren't required for device assignment.
>

Devices are expected to send MSI writes as MemWr with AT=00b, which
triggers address translation by the responsible IOMMU. While the
current MSI target address is identical to the IMSIC physical address,
direct mapping might work; however, I consider this an interim hack to
achieve basic MSI forwarding. It is quite similar to a workaround I
previously used utilizing IOMMU_RESV_MSI types [1], which worked well
enough with VFIO interfaces (assuming unsafe interrupts are
acceptable).

I would prefer to use the iommu_dma_prepare_msi() path, as Jason
suggested, or implement complete IRQ remapping for RISC-V IOMMU.

[1] https://github.com/tjeznach/linux/commit/3a165e1b8f7cc4d00770a932fc0840cfed760485

> Loop over the cpus rather than imsic groups to handle asymmetric
> configurations.
>
> Signed-off-by: Andrew Jones <andrew.jones at oss.qualcomm.com>
> ---
>  drivers/iommu/riscv/iommu.c         | 34 +++++++++++++++++++++++++++++
>  include/linux/irqchip/riscv-imsic.h |  7 ++++++
>  2 files changed, 41 insertions(+)
>
> diff --git a/drivers/iommu/riscv/iommu.c b/drivers/iommu/riscv/iommu.c
> index a31f50bbad35..3c6aa9d69f95 100644
> --- a/drivers/iommu/riscv/iommu.c
> +++ b/drivers/iommu/riscv/iommu.c
> @@ -19,6 +19,7 @@
>  #include <linux/init.h>
>  #include <linux/iommu.h>
>  #include <linux/iopoll.h>
> +#include <linux/irqchip/riscv-imsic.h>
>  #include <linux/kernel.h>
>  #include <linux/pci.h>
>  #include <linux/generic_pt/iommu.h>
> @@ -1286,6 +1287,38 @@ static struct iommu_domain *riscv_iommu_alloc_paging_domain(struct device *dev)
>         return &domain->domain;
>  }
>
> +static void riscv_iommu_get_resv_regions(struct device *dev, struct list_head *head)
> +{
> +       const struct imsic_global_config *imsic_global;
> +       unsigned int cpu;
> +
> +       if (!imsic_enabled())
> +               return;
> +
> +       imsic_global = imsic_get_global_config();
> +
> +       for_each_possible_cpu(cpu) {
> +               const struct imsic_local_config *local;
> +               struct iommu_resv_region *reg;
> +
> +               local = per_cpu_ptr(imsic_global->local, cpu);
> +               if (!local->msi_va)
> +                       continue;
> +
> +               /*
> +                * The device always writes to the host physical IMSIC address, so install
> +                * identity mappings directly. Use IOMMU_RESV_DIRECT_RELAXABLE instead of
> +                * IOMMU_RESV_DIRECT since these 1:1 mappings are not required for assigned
> +                * devices.
> +                */

As mentioned earlier, the comment "1:1 mappings are not required for
assigned devices" is inaccurate, assuming we'd like MSI to work.

> +               reg = iommu_alloc_resv_region(local->msi_pa, IMSIC_MMIO_PAGE_SZ,
> +                                             IOMMU_WRITE | IOMMU_NOEXEC | IOMMU_MMIO,
> +                                             IOMMU_RESV_DIRECT_RELAXABLE, GFP_KERNEL);
> +               if (reg)
> +                       list_add_tail(&reg->list, head);
> +       }
> +}
> +
>  static int riscv_iommu_attach_blocking_domain(struct iommu_domain *iommu_domain,
>                                               struct device *dev,
>                                               struct iommu_domain *old)
> @@ -1401,6 +1434,7 @@ static const struct iommu_ops riscv_iommu_ops = {
>         .blocked_domain = &riscv_iommu_blocking_domain,
>         .release_domain = &riscv_iommu_blocking_domain,
>         .domain_alloc_paging = riscv_iommu_alloc_paging_domain,
> +       .get_resv_regions = riscv_iommu_get_resv_regions,
>         .device_group = riscv_iommu_device_group,
>         .probe_device = riscv_iommu_probe_device,
>         .release_device = riscv_iommu_release_device,
> diff --git a/include/linux/irqchip/riscv-imsic.h b/include/linux/irqchip/riscv-imsic.h
> index 4b348836de7a..ba3000f047b0 100644
> --- a/include/linux/irqchip/riscv-imsic.h
> +++ b/include/linux/irqchip/riscv-imsic.h
> @@ -88,6 +88,13 @@ static inline const struct imsic_global_config *imsic_get_global_config(void)
>
>  #endif
>
> +static inline bool imsic_enabled(void)
> +{
> +       const struct imsic_global_config *imsic_global = imsic_get_global_config();
> +
> +       return imsic_global && imsic_global->nr_ids;
> +}
> +
>  #if IS_ENABLED(CONFIG_ACPI) && IS_ENABLED(CONFIG_RISCV_IMSIC)
>  int imsic_platform_acpi_probe(struct fwnode_handle *fwnode);
>  struct fwnode_handle *imsic_acpi_get_fwnode(struct device *dev);
> --
> 2.43.0
>

Best,
- Tomasz