[PATCH v1 11/20] dt-bindings: pinctrl: Add starfive,jhb100-per1-pinctrl

[Changhuang Liang]

Hi, linus

Thanks for the review.

> Hi Changhuang,
> 
> thanks for your patch!
> 
> On Fri, Apr 24, 2026 at 1:14 PM Changhuang Liang
> <changhuang.liang at starfivetech.com> wrote:
> 
> > Add pinctrl bindings for StarFive JHB100 SoC Peripheral-1(per1)
> > pinctrl controller.
> >
> > Signed-off-by: Changhuang Liang <changhuang.liang at starfivetech.com>
> (...)
> 
> > +  This domain contains 4 IO groups which support voltage levels 1.8V
> > + and 3.3V  gpioe-spi - comprises PAD_GPIO_C0 through PAD_GPIO_C4.
> > +  gpioe-qspi0 - comprises PAD_GPIO_C5 through PAD_GPIO_C11.
> > +  gpioe-qspi1 - comprises PAD_GPIO_C12 through PAD_GPIO_C19.
> > +  gpioe-qspi2 - comprises PAD_GPIO_C20 through PAD_GPIO_C27.
> > +
> > +  Each of the above IO groups must be configured with a voltage
> > + setting that matches the external  voltage level provided to the IO group.
> 
> So your hardware has groups and support some properties on the group level.
> 
> So expose these groups and make these properties configurable per group
> instead of inventing per-group properties.
> 
> > +  gpioe-spi-vref:
> > +  gpioe-qspi0-vref:
> > +  gpioe-qspi1-vref:
> > +  gpioe-qspi2-vref:
> 
> Create proper groups in the pin controller then use the standard pincfg
> property power-source = <...>; for this.
> 
> Example for a simple default hog:
> 
> pinctrl {
>     /* Hog the QSPI pins */
>     pinctrl-names = "default";
>     pinctrl-0 = <&qspi_default>;
> 
>     qspi_default: pinctrl-qspi {
>         config {
>             groups = "gpioe-qspi-pins";
>             power-source = <2>;
>         };
>     };
> };
> 
> The groups can be orthogonal to other pin handling, that's fine.
> Implement .pin_config_group_set in struct pinconf_ops.

We will try this. Thanks.

Best Regards,
Changhuang