[PATCH 2/2] PCI: Add quirk to disable PCIe port services on Sophgo SG2042

[Icenowy Zheng]

在 2026-05-02六的 21:47 +0200，Lukas Wunner写道：
> On Sat, May 02, 2026 at 09:58:04PM +0800, Icenowy Zheng wrote:
> > The problem is that the MSI controller has only 16 MSIs usable
> > (it's
> > wrongly described as 32 previously, a fix to this is pending[1]),
> > and
> > the failing device have an onboard PCIe switch, which created many
> > PCIe
> > ports (and corresponding pcieport devices).
> 
> Is the SG2042 only used in that single product?  If it is used in
> other
> products which do not have an on-board PCIe switch, why do you want
> to
> disable MSIs on those other products as well?

It's used in multiple products, but only one of them (EVBv1, which is
just an early EVB available for a few people including me) lacks an
onboard switch, because SG2042 is short on on-chip peripherals. All
other devices (including two mainlined ones, EVBv2 and Milk-V Pioneer,
and unmainlined dual socket rack servers; Milk-V Pioneer should be the
most popular device because it was on shelf) have an onboard switch to
mitigate the lack of on-chip peripherals in SG2042.

> 
> My point is, you want to constrain this to a specific product, not to
> the SoC.  Can you maybe solve this by not specifying interrupts in
> the
> devicetree for the PCIe switch?

The PCIe switches are not described in the device tree at all, because
they're all just discoverable; can we describe them in the DT and
redirect their interrupts to void?

> 
> > With pcieport devices activated, 11 MSIs are requested by the
> > pcieport
> > drivers -- 3 SoC PCIe ports and 8 switch downstream ports. Then
> > only 5
> > MSIs are available, but there're still 10 downstream-facing PCIe
> > ports
> > now (and 5 of them are hardwired to onboard peripherals).
> 
> pcieport can make do with a single MSI vector because all port
> services
> support a shared interrupt.  But I assume your point is that this
> particular product has so many PCIe ports that you're still close
> to the 16 MSIs limit?

Yes, different services of the same port are now sharing a single MSI
(the 3 native ports have PME, aerdrv, bwctrl sharing the same IRQ while
the only service available for switch downstream ports is bwctrl).
However there're 11 ports (3 native ports + 8 switch downstream ports),
so this still leaves too few room for other cards.

Thanks,
Icenowy

> 
> Thanks,
> 
> Lukas
> 
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