[PATCH v2 0/8] Support non-leaf and range invalidation features in RISC-V

[patchwork-bot+linux-riscv at kernel.org]

Hello:

This series was applied to riscv/linux.git (fixes)
by Joerg Roedel <joerg.roedel at amd.com>:

On Fri,  8 May 2026 11:52:59 -0300 you wrote:
> This is part of the patch pile to get SMMUv3 moved to iommupt. From
> that perspective it introduces the PT_FEAT_DETAILED_GATHER which will
> be used by both RISC-V and SMMUv3 to generate optimized invalidation
> commands.
> 
> I don't have any RISC-V anything so this needs to be tested by someone who
> does.
> 
> [...]

Here is the summary with links:
  - [v2,1/8] iommu: Split the kdoc comment for struct iommu_iotlb_gather
    https://git.kernel.org/riscv/c/74c9d82c7e3f
  - [v2,2/8] iommupt: Add struct iommupt_pending_gather
    https://git.kernel.org/riscv/c/f0e4b7f5f875
  - [v2,3/8] iommupt: Add PT_FEAT_DETAILED_GATHER
    https://git.kernel.org/riscv/c/89792629d4b2
  - [v2,4/8] iommu/riscv: Enable PT_FEAT_DETAILED_GATHER and pass gather to iotlb_inval
    (no matching commit)
  - [v2,5/8] iommu/riscv: Compute best stride for single invalidation
    https://git.kernel.org/riscv/c/bb62adcf4513
  - [v2,6/8] iommu/riscv: Add RISCV_IOMMU_CAPABILITIES_NL
    https://git.kernel.org/riscv/c/e4084c6bbb42
  - [v2,7/8] iommu/riscv: Include the dword number in RISCV_IOMMU_CMD macros
    https://git.kernel.org/riscv/c/835d06ee7ef0
  - [v2,8/8] iommu/riscv: Add NAPOT range invalidation support
    https://git.kernel.org/riscv/c/082ad5ed0785

You are awesome, thank you!
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