[PATCH 1/7] riscv: dts: eswin: add reset generator for EIC7700 SoC
Pinkesh Vaghela
pinkesh.vaghela at einfochips.com
Mon Jun 15 05:20:10 PDT 2026
From: Pritesh Patel <pritesh.patel at einfochips.com>
Add reset generator node for EIC7700 SoC
Signed-off-by: Pritesh Patel <pritesh.patel at einfochips.com>
Signed-off-by: Pinkesh Vaghela <pinkesh.vaghela at einfochips.com>
---
arch/riscv/boot/dts/eswin/eic7700.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/riscv/boot/dts/eswin/eic7700.dtsi b/arch/riscv/boot/dts/eswin/eic7700.dtsi
index c3ed93008bca..430a210f01e6 100644
--- a/arch/riscv/boot/dts/eswin/eic7700.dtsi
+++ b/arch/riscv/boot/dts/eswin/eic7700.dtsi
@@ -4,6 +4,7 @@
*/
/dts-v1/;
+#include <dt-bindings/reset/eswin,eic7700-reset.h>
/ {
#address-cells = <2>;
@@ -341,5 +342,11 @@ gpioD: gpio-port at 3 {
#gpio-cells = <2>;
};
};
+
+ reset: reset-controller at 51828300 {
+ compatible = "eswin,eic7700-reset";
+ reg = <0x0 0x51828300 0x0 0x200>;
+ #reset-cells = <1>;
+ };
};
};
--
2.34.1
More information about the linux-riscv
mailing list