[PATCH RESEND 08/17] drm/spacemit: add Saturn DPU core types, cmdlist and display MMU
Philipp Zabel
p.zabel at pengutronix.de
Mon Jul 27 00:35:35 PDT 2026
On Sa, 2026-07-25 at 00:51 -0400, Cody Kang via B4 Relay wrote:
> From: Cody Kang <codykang.hk at gmail.com>
>
> Register programming of the Saturn DPU is batched: the driver builds
> per-module register lists in memory and the hardware command-list
> engine replays them at frame boundaries, while scanout buffers are
> mapped through the DPU's private address translation unit (DMMU)
> rather than scanned out by physical address.
>
> Add the shared driver types, the MMIO field accessors, the trace
> events, the command-list builder and the DMMU table code. Some DPU
> configuration registers are write-only, so a read-modify-write would
> corrupt neighbouring fields; byte- and halfword-aligned fields are
> therefore written at their native width instead.
>
> Signed-off-by: Cody Kang <codykang.hk at gmail.com>
> ---
> drivers/gpu/drm/spacemit/dpu/dpu_saturn.h | 35 +++
> drivers/gpu/drm/spacemit/dpu/dpu_trace.h | 350 ++++++++++++++++++++++++++++
> drivers/gpu/drm/spacemit/spacemit_cmdlist.c | 304 ++++++++++++++++++++++++
> drivers/gpu/drm/spacemit/spacemit_cmdlist.h | 146 ++++++++++++
> drivers/gpu/drm/spacemit/spacemit_crtc.h | 259 ++++++++++++++++++++
> drivers/gpu/drm/spacemit/spacemit_dmmu.c | 103 ++++++++
> drivers/gpu/drm/spacemit/spacemit_dmmu.h | 40 ++++
> drivers/gpu/drm/spacemit/spacemit_dpu_reg.h | 108 +++++++++
> drivers/gpu/drm/spacemit/spacemit_drm.h | 68 ++++++
> 9 files changed, 1413 insertions(+)
>
[...]
> diff --git a/drivers/gpu/drm/spacemit/spacemit_cmdlist.h b/drivers/gpu/drm/spacemit/spacemit_cmdlist.h
> new file mode 100644
> index 000000000000..d5acdbeb3b0e
> --- /dev/null
> +++ b/drivers/gpu/drm/spacemit/spacemit_cmdlist.h
> @@ -0,0 +1,146 @@
[...]
> +struct spacemit_crtc {
> + struct device *dev;
> + struct drm_crtc crtc;
> + const struct dpu_core_ops *core;
> + struct dpu_mmu_tbl mmu_tbl;
> + int dev_id;
> + int irq_online;
> + struct timer_list cfg_rdy_timer;
> +
> + bool is_1st_f;
> + bool first_modeset;
> + struct dpu_clk_context clk_ctx;
> + u32 aclk;
> + u32 out_format;
> +
> + struct reset_control *mclk_reset;
> + struct reset_control *lcd_reset;
> + struct reset_control *esc_reset;
> + struct reset_control *aclk_reset;
> + struct reset_control *dsc_reset;
Why are these duplicated from spacemit_drm_private?
dpu_pm_suspend/resume() in patch 10 have access to priv.
regards
Philipp
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