[PATCH 0/2] Add CoreSight nodes for Qualcomm Shikra SoC
Jie Gan
jie.gan at oss.qualcomm.com
Thu Jul 23 01:16:47 PDT 2026
On 7/23/2026 9:46 AM, Jie Gan wrote:
> This series adds the CoreSight debug and trace subsystem for the
> Qualcomm Shikra SoC.
>
> The first patch adds a fallback compatible for the Shikra CTCU (CoreSight
> Trace Control Unit). The CTCU on Shikra shares the same configuration as
> the one on SA8775p, so "qcom,shikra-ctcu" falls back to the existing
> "qcom,sa8775p-ctcu" compatible.
>
> The second patch adds the DT nodes describing the CoreSight topology on
> Shikra, including the funnels, replicators, TMC sinks (ETR/ETF), STM,
> per-core ETMs, CTIs, and the TPDM/TPDA trace collection blocks, along
> with the CTCU and the dummy source/sink endpoints that model external
> trace sources and the EUD sink.
I just found the version number is wrong for the series, it should be V4.
I have checked my b4 branch, confirmed the version number has been
cleared by mistake. Will take care of it in the future.
Thanks,
Jie
>
> ---
> Changes in V4:
> - fix the wrong subject for the dt-binding patch
> - Link to v3: https://lore.kernel.org/all/20260722-add-coresight-nodes-for-shikra-v3-0-1400a3454e9f@oss.qualcomm.com/
>
> Changes in v3:
> - add correct subsystem prefix in dt-binding subject.
> - Link to v2: https://lore.kernel.org/r/20260715-add-coresight-nodes-for-shikra-v2-0-ebd485e39a51@oss.qualcomm.com
>
> Changes in v2:
> - remove MMIO for the ETM devices.
> - Link to v1: https://lore.kernel.org/r/20260714-add-coresight-nodes-for-shikra-v1-0-b1cf85962455@oss.qualcomm.com
>
> To: Suzuki K Poulose <suzuki.poulose at arm.com>
> To: Mike Leach <mike.leach at arm.com>
> To: James Clark <james.clark at linaro.org>
> To: Leo Yan <leo.yan at arm.com>
> To: Rob Herring <robh at kernel.org>
> To: Krzysztof Kozlowski <krzk+dt at kernel.org>
> To: Conor Dooley <conor+dt at kernel.org>
> To: Tingwei Zhang <tingwei.zhang at oss.qualcomm.com>
> To: Yuanfang Zhang <yuanfang.zhang at oss.qualcomm.com>
> To: Mao Jinlong <jinlong.mao at oss.qualcomm.com>
> To: Bjorn Andersson <andersson at kernel.org>
> To: Konrad Dybcio <konradybcio at kernel.org>
> To: Paul Walmsley <pjw at kernel.org>
> To: Palmer Dabbelt <palmer at dabbelt.com>
> To: Albert Ou <aou at eecs.berkeley.edu>
> To: Alexandre Ghiti <alex at ghiti.fr>
> Cc: coresight at lists.linaro.org
> Cc: linux-arm-kernel at lists.infradead.org
> Cc: linux-arm-msm at vger.kernel.org
> Cc: devicetree at vger.kernel.org
> Cc: linux-kernel at vger.kernel.org
> Cc: linux-riscv at lists.infradead.org
> Signed-off-by: Jie Gan <jie.gan at oss.qualcomm.com>
>
> ---
> Jie Gan (2):
> dt-bindings: arm: qcom,coresight-ctcu: Add Shikra
> arm64: dts: qcom: shikra: Add coresight nodes
>
> .../bindings/arm/qcom,coresight-ctcu.yaml | 1 +
> arch/arm64/boot/dts/qcom/shikra.dtsi | 1295 ++++++++++++++++++++
> 2 files changed, 1296 insertions(+)
> ---
> base-commit: 290aaf24a551d5a0dce037e3fab30820f9113a10
> change-id: 20260722-add-coresight-nodes-for-shikra-5fb8a4b503d1
>
> Best regards,
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