[GIT PULL] KVM/riscv fixes for 7.2 take #1

[Anup Patel]

Hi Paolo,

We have the following fixes for the 7.2 kernel:
1) Avoid redundant page-table allocations in ioremap pcache topup
2) Apply SBI FWFT LOCK flag only on successful set
3) Bound SBI PMU counter mask scan to BITS_PER_LONG
4) Skip TLB flush when G-stage PTE becomes valid with Svvptc
5) Zicbo[m|z|p] block sizes should be always present in ONE_REG
6) Inject instruction access fault on unmapped guest fetch
7) Serialize virtual interrupt pending state updates using a raw spinlock
8) Fix Spectre-v1 in vector register access via ONE_REG

Please pull.

Regards,
Anup

The following changes since commit a13c140cc289c0b7b3770bce5b3ad42ab35074aa:

  Linux 7.2-rc3 (2026-07-12 14:16:39 -0700)

are available in the Git repository at:

  https://github.com/kvm-riscv/linux.git tags/kvm-riscv-fixes-7.2-1

for you to fetch changes up to 8d9c9b135b5c23de9811a8426257cbd2fa024a99:

  KVM: riscv: Fix Spectre-v1 in vector register access (2026-07-15
18:06:16 +0530)

----------------------------------------------------------------
KVM/riscv fixes for 7.2, take #1

- Avoid redundant page-table allocations in ioremap pcache topup
- Apply SBI FWFT LOCK flag only on successful set
- Bound SBI PMU counter mask scan to BITS_PER_LONG
- Skip TLB flush when G-stage PTE becomes valid with Svvptc
- Zicbo[m|z|p] block sizes should be always present in ONE_REG
- Inject instruction access fault on unmapped guest fetch
- Serialize virtual interrupt pending state updates using raw spinlock
- Fix Spectre-v1 in vector register access via ONE_REG

----------------------------------------------------------------
Anup Patel (1):
      RISC-V: KVM: Zicbo[m|z|p] block sizes should be always present in ONE_REG

Dylan.Wu (1):
      riscv: kvm: Skip TLB flush when G-stage PTE becomes valid with Svvptc

Fangyu Yu (1):
      RISC-V: KVM: Avoid redundant page-table allocations in ioremap topup

Qingwei Hu (1):
      RISC-V: KVM: Inject instruction access fault on unmapped guest fetch

SeungJu Cheon (1):
      KVM: riscv: SBI FWFT: Apply LOCK flag only on successful set

Shengwen Cheng (1):
      KVM: riscv: PMU: Bound counter mask scan to BITS_PER_LONG

Xie Bo (1):
      RISC-V: KVM: Serialize virtual interrupt pending state updates

Zongmin Zhou (1):
      KVM: riscv: Fix Spectre-v1 in vector register access

 arch/riscv/include/asm/kvm_host.h | 10 +++---
 arch/riscv/kvm/aia.c              | 35 ++++++++++++++++----
 arch/riscv/kvm/gstage.c           |  6 +++-
 arch/riscv/kvm/mmu.c              |  3 +-
 arch/riscv/kvm/vcpu.c             | 68 +++++++++++++++++++++++++++------------
 arch/riscv/kvm/vcpu_exit.c        | 19 +++++++++++
 arch/riscv/kvm/vcpu_onereg.c      | 46 +++++++-------------------
 arch/riscv/kvm/vcpu_pmu.c         |  4 +--
 arch/riscv/kvm/vcpu_sbi_fwft.c    |  6 ++--
 arch/riscv/kvm/vcpu_vector.c      | 14 ++++++--
 10 files changed, 137 insertions(+), 74 deletions(-)