[PATCH v3] iommu/riscv: Use 32-bit MMIO accesses for 64-bit registers

[Chen Pei]

On Tue, Jul 14, 2026 at 09:55:19PM +0800, Guo Ren wrote:
> The specification is deliberately precise. It uses "may", not "shall"
> or "must". We should not introduce speculative implications that break
> the spec's consistency on RV32. The safe and portable interpretation
> is that software is explicitly allowed to use 32-bit accesses for
> these registers on any system, which is exactly what this patch does.

The RV32 argument is quite compelling. The RISC-V IOMMU is a
platform-level IP that must serve both RV32 and RV64 software stacks.
Mandating 64-bit MMIO accesses would directly conflict with RV32, where
such accesses are impossible — so any interpretation that turns "may be
accessed using either a 32-bit or a 64-bit access" into an implicit
hardware requirement for 64-bit accesses breaks the spec's own
consistency on RV32.

The RFC 2119 argument is equally strong. In RFC 2119 terms, "MAY" means
an item is truly optional — a specification should express obligations
through these well-defined normative keywords, not leave them to be
inferred from everyday-language intuition. If the spec authors had
intended to require hardware to support 64-bit accesses, they would have
said "must" or "shall".

Given both points, treating 32-bit MMIO accesses as the default for the
RISC-V IOMMU driver is the safe, portable, and more inclusive choice: it
is explicitly permitted on every conformant implementation, whereas
64-bit access atomicity is left unspecified.

Acked-by: Chen Pei <cp0613 at linux.alibaba.com>

Thanks,
Pei