[PATCH v4 0/7] irqchip/ACPI: Arm GICv5 IWB ACPI IRQ probe deferral
Rafael J. Wysocki (Intel)
rafael at kernel.org
Thu Jul 9 06:32:10 PDT 2026
On Thu, Jul 9, 2026 at 10:41 AM Lorenzo Pieralisi <lpieralisi at kernel.org> wrote:
>
> On Arm GICv5 systems, the IWB (Interrupt Wire Bridge) handles wired interrupts
> and it is in charge of translating interrupt wires to GICv5 ITS messages.
>
> In ACPI systems, an IWB is backed by a platform device. Device drivers for
> devices whose IRQs are routed to an IWB might probe earlier than the IWB device
> driver, which can result in failures in that until the IWB driver is probed and
> its IRQ domain is duly registered, IRQs routed to it cannot be resolved.
>
> Some interrupt controllers for the RISC-V architecture suffer from the same
> issue; RISC-V, in its ACPI IRQ layer solved the problem by automatically
> creating device dependencies that result in the interrupt controllers drivers
> being probed before any device driver whose devices IRQs are routed to them is
> probed.
>
> Instead of reinventing the wheel, this series move the aforementioned RISC-V
> code to generic ACPI IRQ handling code (while fixing some bits and pieces) and
> implement GICv5 IWB ACPI probe deferral on top of it.
>
> Signed-off-by: Lorenzo Pieralisi <lpieralisi at kernel.org>
> ---
> Changes in v4:
> - Applied v3 review comments and tags
> - Link to v3: https://patch.msgid.link/20260701-gic-v5-acpi-iwb-probe-deferral-v3-0-c5562cf0fe29@kernel.org
>
> Changes in v3:
> - Added stub to clear ACPI device dependencies
> - Added review tags
> - Rebased against v7.2-rc1
> - Link to v2: https://patch.msgid.link/20260603-gic-v5-acpi-iwb-probe-deferral-v2-0-23ffa16b6ebb@kernel.org
>
> Changes in v2:
> - Split the patchset in several logic units according to review
> - Link to v1: https://patch.msgid.link/20260505-gic-v5-acpi-iwb-probe-deferral-v1-0-b37b85998362@kernel.org
>
> To: "Rafael J. Wysocki" <rafael at kernel.org>
> To: Len Brown <lenb at kernel.org>
> To: Sunil V L <sunilvl at ventanamicro.com>
> To: Marc Zyngier <maz at kernel.org>
> To: Thomas Gleixner <tglx at kernel.org>
> To: Lorenzo Pieralisi <lpieralisi at kernel.org>
> To: Huacai Chen <chenhuacai at kernel.org>
> To: Anup Patel <anup at brainfault.org>
> To: Hanjun Guo <guohanjun at huawei.com>
> To: Sudeep Holla <sudeep.holla at kernel.org>
> To: Catalin Marinas <catalin.marinas at arm.com>
> To: Will Deacon <will at kernel.org>
> Cc: linux-acpi at vger.kernel.org
> Cc: linux-kernel at vger.kernel.org
> Cc: "Rafael J. Wysocki" <rafael.j.wysocki at intel.com>
> Cc: linux-riscv at lists.infradead.org
> Cc: linux-arm-kernel at lists.infradead.org
> Cc: loongarch at lists.linux.dev
>
> ---
> Lorenzo Pieralisi (7):
> ACPI: Add acpi_device_clear_deps() helper function
> ACPI: RISC-V: Fix riscv_acpi_irq_get_dep() loop termination
> ACPI: RISC-V: Check acpi_get_handle() status in riscv_acpi_add_prt_dep()
> ACPI: RISC-V: Fix riscv_acpi_add_prt_dep() loop handling
> ACPI: irq: Move RISC-V interrupt controllers autodep to ACPI IRQ code
> ACPI/IORT: Implement ACPI infrastructure to enable GICv5 IWB probe deferral
> irqchip/gic-v5: Enable GICv5 IWB ACPI probe ordering detection
>
> arch/riscv/include/asm/acpi.h | 1 +
> drivers/acpi/arm64/iort.c | 22 ++++-
> drivers/acpi/irq.c | 172 +++++++++++++++++++++++++++++++++++-
> drivers/acpi/riscv/irq.c | 141 +----------------------------
> drivers/acpi/scan.c | 1 +
> drivers/irqchip/irq-gic-v3.c | 2 +-
> drivers/irqchip/irq-gic-v5-iwb.c | 2 +
> drivers/irqchip/irq-gic-v5.c | 13 ++-
> drivers/irqchip/irq-gic.c | 2 +-
> drivers/irqchip/irq-loongarch-cpu.c | 2 +-
> drivers/irqchip/irq-riscv-intc.c | 3 +-
> include/linux/acpi.h | 13 ++-
> include/linux/acpi_iort.h | 3 +-
> 13 files changed, 223 insertions(+), 154 deletions(-)
> ---
All applied as 7.3 material, thanks!
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