[PATCH 0/2] RISC-V: KVM: Optimize hfence request handling for SMP guests

[Wang Yechao]

This series improves the hfence request handling in RISC-V KVM,
targeting scenarios where multiple VCPUs are running an SMP guest.

The first patch moves the hfence data/type validation out of the
VCPU loop to avoid redundant checks on every iteration.

The second patch fixes a more subtle performance issue: when one
VCPU's hfence queue becomes full and triggers a fallback, the
current code applies the fallback to all VCPUs indiscriminately.
This unnecessarily degrades healthy VCPUs and can cause their
queues to fill up prematurely due to lack of processing it.

With these changes, fallback is applied only to the VCPUs that
actually need it, preserving the efficiency of the normal path
for others.

Wang Yechao (2):
  RISC-V: KVM: Move hfence type check out of loop
  RISC-V: KVM: Separate req and fallback_req masks in
    make_xfence_request

 arch/riscv/kvm/tlb.c | 22 ++++++++++++----------
 1 file changed, 12 insertions(+), 10 deletions(-)

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2.43.5