[PATCH v6 0/2] riscv: add c.jal instruction simulation for kprobes

[Xiaofeng Yuan]

The c.jal instruction is part of the RISC-V compressed instruction set
and is defined only on RV32.  Currently kprobes rejects it, causing
probes placed on c.jal to fail.

This series adds simulation support for c.jal and includes a test
case by Nam Cao.

Changes since v5:
  - Removed the #if __riscv_xlen == 32 guards around simulate_c_jal()
    as both Charlie Jenkins and Nam Cao agreed they are unnecessary.
    On RV64, riscv_insn_is_c_jal() always returns 0 so the simulation
    code is never invoked, and the small overhead in kernel size is
    acceptable.
  - Included Nam Cao's test case for c.jal instruction simulation.

Changes since v4:
  - Reuse simulate_c_j() for the jump logic (Nam Cao)
  - Use direct register assignment instead of rv_insn_reg_set_val()
  - Move RISCV_INSN_SET_SIMULATE(c_jal) to group with other compressed
    jump instructions

Nam Cao (1):
  riscv: kprobes: add test case for c.jal instruction simulation

Xiaofeng Yuan (1):
  riscv: probes: simulate c.jal instruction

Nam Cao (1):
  riscv: kprobes: add test case for c.jal instruction simulation

Xiaofeng Yuan (1):
  riscv: probes: simulate c.jal instruction

 arch/riscv/kernel/probes/decode-insn.c        |  2 +-
 arch/riscv/kernel/probes/simulate-insn.c      |  7 ++++++
 arch/riscv/kernel/probes/simulate-insn.h      |  1 +
 .../kernel/tests/kprobes/test-kprobes-asm.S   | 24 +++++++++++++++++++
 4 files changed, 33 insertions(+), 1 deletion(-)

-- 
2.43.0