[PATCH 3/3] riscv: cpufeature: Clarify ISA spec version for canonical order

[Conor Dooley]

On Fri, Jan 16, 2026 at 10:10:33AM +0800, Guodong Xu wrote:
> Specify that chapter 27 refers to version 20191213 of the RISC-V ISA
> Unprivileged Architecture. The chapter numbering differs across
> specification versions - for example, in version 20250508, the ISA
> Extension Naming Conventions is chapter 36, not chapter 27.
> 
> Historical versions of the RISC-V specification can be found via Link [1].
> 
> Link: https://riscv.org/specifications/ratified/ [1]
> Fixes: 8135ade32c0db ("RISC-V: shunt isa_ext_arr to cpufeature.c")

I don't think that's the right fixes tag, if a fixes tag is even
appropriate. If a fixes tag is to be used, it should actually be
Fixes: 99e2266f2460 ("RISC-V: clarify ISA string ordering rules in cpu.c")

Acked-by: Conor Dooley <conor.dooley at microchip.com>

> Signed-off-by: Guodong Xu <guodong at riscstar.com>
> ---
>  arch/riscv/kernel/cpufeature.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> index 39680280f858..629984df1e7b 100644
> --- a/arch/riscv/kernel/cpufeature.c
> +++ b/arch/riscv/kernel/cpufeature.c
> @@ -461,7 +461,8 @@ static const unsigned int riscv_supm_exts[] = {
>  
>  /*
>   * The canonical order of ISA extension names in the ISA string is defined in
> - * chapter 27 of the unprivileged specification.
> + * Chapter 27 of the RISC-V Instruction Set Manual Volume I Unprivileged ISA
> + * (Document Version 20191213).
>   *
>   * Ordinarily, for in-kernel data structures, this order is unimportant but
>   * isa_ext_arr defines the order of the ISA string in /proc/cpuinfo.
> 
> -- 
> 2.43.0
> 
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