[PATCH 24/27] RISC-V: KVM: Add ONE_REG interface for nested virtualization state

[Anup Patel]

Add nested virtualization state to CORE registers of the KVM RISC-V
ONE_REG interface so that it can be updated from KVM user-space in
the same way as privileged mode.

Signed-off-by: Anup Patel <anup.patel at oss.qualcomm.com>
---
 arch/riscv/include/uapi/asm/kvm.h | 1 +
 arch/riscv/kvm/vcpu_onereg.c      | 5 +++++
 2 files changed, 6 insertions(+)

diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h
index 504e73305343..f62eaa47745b 100644
--- a/arch/riscv/include/uapi/asm/kvm.h
+++ b/arch/riscv/include/uapi/asm/kvm.h
@@ -65,6 +65,7 @@ struct kvm_riscv_config {
 struct kvm_riscv_core {
 	struct user_regs_struct regs;
 	unsigned long mode;
+	unsigned long virt;
 };
 
 /* Possible privilege modes for kvm_riscv_core */
diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c
index 6b16eee2c833..5f0d10beeb98 100644
--- a/arch/riscv/kvm/vcpu_onereg.c
+++ b/arch/riscv/kvm/vcpu_onereg.c
@@ -219,6 +219,8 @@ static int kvm_riscv_vcpu_get_reg_core(struct kvm_vcpu *vcpu,
 	else if (reg_num == KVM_REG_RISCV_CORE_REG(mode))
 		reg_val = (cntx->sstatus & SR_SPP) ?
 				KVM_RISCV_MODE_S : KVM_RISCV_MODE_U;
+	else if (reg_num == KVM_REG_RISCV_CORE_REG(virt))
+		reg_val = kvm_riscv_vcpu_nested_virt(vcpu);
 	else
 		return -ENOENT;
 
@@ -257,6 +259,9 @@ static int kvm_riscv_vcpu_set_reg_core(struct kvm_vcpu *vcpu,
 			cntx->sstatus |= SR_SPP;
 		else
 			cntx->sstatus &= ~SR_SPP;
+	} else if (reg_num == KVM_REG_RISCV_CORE_REG(virt)) {
+		if (riscv_isa_extension_available(vcpu->arch.isa, h))
+			kvm_riscv_vcpu_nested_virt(vcpu) = !!reg_val;
 	} else
 		return -ENOENT;
 
-- 
2.43.0