[PATCH NFU RFC 18/19] riscv: dts: qemu: add CBQRI controller nodes
Drew Fustini
fustini at kernel.org
Mon Jan 19 20:14:55 PST 2026
[NOT FOR UPSTREAM]
Add nodes to for CBQRI-capable cache and bandwidth controllers.
Link: https://github.com/tt-fustini/qemu/tree/b4/riscv-ssqosid-cbqri
Co-developed-by: Adrien Ricciardi <aricciardi at baylibre.com>
Signed-off-by: Adrien Ricciardi <aricciardi at baylibre.com>
Signed-off-by: Drew Fustini <fustini at kernel.org>
---
arch/riscv/boot/dts/qemu/qemu-virt-cbqri.dts | 59 ++++++++++++++++++++++++++++
1 file changed, 59 insertions(+)
diff --git a/arch/riscv/boot/dts/qemu/qemu-virt-cbqri.dts b/arch/riscv/boot/dts/qemu/qemu-virt-cbqri.dts
index 4c6257bec42d..9f65de65f758 100644
--- a/arch/riscv/boot/dts/qemu/qemu-virt-cbqri.dts
+++ b/arch/riscv/boot/dts/qemu/qemu-virt-cbqri.dts
@@ -395,5 +395,64 @@ pci at 30000000 {
#interrupt-cells = <0x01>;
#address-cells = <0x03>;
};
+
+ cluster0_l2: controller at 4820000 {
+ compatible = "riscv,cbqri-cache";
+ reg = <0x0 0x4820000 0x0 0x1000>; /* 4KB at 0x04820000 */
+ cache-unified;
+ cache-line-size = <64>;
+ cache-level = <2>;
+ cache-sets = <1000>;
+ cache-size = <768000>; /* 750 KiB */
+ next-level-cache = <&shared_llc>;
+ riscv,cbqri-rcid = <64>;
+ riscv,cbqri-mcid = <256>;
+ };
+
+ cluster1_l2: controller at 4821000 {
+ compatible = "riscv,cbqri-cache";
+ reg = <0x0 0x4821000 0x0 0x1000>; /* 4KB at 0x04821000 */
+ cache-unified;
+ cache-line-size = <64>;
+ cache-level = <2>;
+ cache-sets = <1000>;
+ cache-size = <768000>; /* 750 KiB */
+ next-level-cache = <&shared_llc>;
+ riscv,cbqri-rcid = <64>;
+ riscv,cbqri-mcid = <256>;
+ };
+
+ shared_llc: controller at 482b000 {
+ compatible = "riscv,cbqri-cache";
+ reg = <0x0 0x482b000 0x0 0x1000>; /* 4KB at 0x0482B000 */
+ cache-unified;
+ cache-line-size = <64>;
+ cache-level = <3>;
+ cache-sets = <4096>;
+ cache-size = <3145728>; /* 3 MiB */
+ riscv,cbqri-rcid = <64>;
+ riscv,cbqri-mcid = <256>;
+ };
+
+ mem0: controller at 4828000 {
+ compatible = "riscv,cbqri-bandwidth";
+ reg = <0x0 0x4828000 0x0 0x1000>; /* 4KB at 0x04828000 */
+ riscv,cbqri-rcid = <64>;
+ riscv,cbqri-mcid = <256>;
+ };
+
+ mem1: controller at 4829000 {
+ compatible = "riscv,cbqri-bandwidth";
+ reg = <0x0 0x4829000 0x0 0x1000>; /* 4KB at 0x04829000 */
+ riscv,cbqri-rcid = <64>;
+ riscv,cbqri-mcid = <256>;
+ };
+
+ mem2: controller at 482a000 {
+ compatible = "riscv,cbqri-bandwidth";
+ reg = <0x0 0x482a000 0x0 0x1000>; /* 4KB at 0x0482A000 */
+ riscv,cbqri-rcid = <64>;
+ riscv,cbqri-mcid = <256>;
+ };
};
};
--
2.43.0
More information about the linux-riscv
mailing list