[PATCH 5/8] soc: tenstorrent: Add rcpu syscon reset register definitions

Anirudh Srinivasan asrinivasan at oss.tenstorrent.com
Thu Jan 15 15:42:04 PST 2026


Document register offsets used for resets in Atlantis

Signed-off-by: Anirudh Srinivasan <asrinivasan at oss.tenstorrent.com>
---
 include/soc/tenstorrent/atlantis-syscon.h | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/include/soc/tenstorrent/atlantis-syscon.h b/include/soc/tenstorrent/atlantis-syscon.h
index b15dabfb42b5..f1dc6ad33c6d 100644
--- a/include/soc/tenstorrent/atlantis-syscon.h
+++ b/include/soc/tenstorrent/atlantis-syscon.h
@@ -19,6 +19,13 @@
 #define PLL_NOCC_EN_REG 0x120
 #define BUS_CG_REG 0x01FC
 
+/* RCPU Reset Register Offsets */
+#define RCPU_BLK_RST_REG 0x1c
+#define LSIO_BLK_RST_REG 0x20
+#define HSIO_BLK_RST_REG 0x0c
+#define PCIE_SUBS_RST_REG 0x00
+#define MM_RSTN_REG 0x14
+
 /* PLL Bit Definitions */
 #define PLL_CFG_EN_BIT BIT(0)
 #define PLL_CFG_BYPASS_BIT BIT(1)

-- 
2.43.0




More information about the linux-riscv mailing list