[PATCH 7/8] reset: tenstorrent: Add reset controller for Atlantis
Anirudh Srinivasan
asrinivasan at oss.tenstorrent.com
Thu Jan 15 15:42:06 PST 2026
Implement reset controller as an auxiliary device of the clock
controller, sharing the same regmap interface. This version of the
driver covers resets from the RCPU syscon.
Signed-off-by: Anirudh Srinivasan <asrinivasan at oss.tenstorrent.com>
---
MAINTAINERS | 1 +
drivers/reset/Kconfig | 11 ++
drivers/reset/Makefile | 1 +
drivers/reset/reset-tenstorrent-atlantis.c | 164 +++++++++++++++++++++++++++++
4 files changed, 177 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 93d941d2886b..31c3e5bcb32d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -22538,6 +22538,7 @@ F: Documentation/devicetree/bindings/riscv/tenstorrent.yaml
F: Documentation/devicetree/bindings/soc/tenstorrent/tenstorrent,atlantis-syscon.yaml
F: arch/riscv/boot/dts/tenstorrent/
F: drivers/clk/tenstorrent/
+F: drivers/reset/reset-tenstorrent-atlantis.c
F: include/dt-bindings/clock/tenstorrent,atlantis-syscon.h
F: include/soc/tenstorrent/
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 6e5d6deffa7d..cade77717492 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -324,6 +324,17 @@ config RESET_SUNXI
help
This enables the reset driver for Allwinner SoCs.
+config RESET_TENSTORRENT_ATLANTIS
+ tristate "Tenstorrent atlantis reset driver"
+ depends on ARCH_TENSTORRENT || COMPILE_TEST
+ select AUXILIARY_BUS
+ default ARCH_TENSTORRENT
+ help
+ This enables the driver for the reset controller
+ present in the Tenstorrent Atlantis SoC.
+ Enable this option to be able to use hardware
+ resets on Atalantis based systems.
+
config RESET_TH1520
tristate "T-HEAD TH1520 reset controller"
depends on ARCH_THEAD || COMPILE_TEST
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 9c3e484dfd81..a31959da0a88 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -41,6 +41,7 @@ obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o
obj-$(CONFIG_RESET_SPACEMIT) += reset-spacemit.o
obj-$(CONFIG_RESET_SUNPLUS) += reset-sunplus.o
obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
+obj-$(CONFIG_RESET_TENSTORRENT_ATLANTIS) += reset-tenstorrent-atlantis.o
obj-$(CONFIG_RESET_TH1520) += reset-th1520.o
obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o
obj-$(CONFIG_RESET_TI_SYSCON) += reset-ti-syscon.o
diff --git a/drivers/reset/reset-tenstorrent-atlantis.c b/drivers/reset/reset-tenstorrent-atlantis.c
new file mode 100644
index 000000000000..b1e934a5b054
--- /dev/null
+++ b/drivers/reset/reset-tenstorrent-atlantis.c
@@ -0,0 +1,164 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2026 Tenstorrent
+ */
+
+#include <linux/auxiliary_bus.h>
+#include <linux/device.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/module.h>
+#include <linux/reset-controller.h>
+#include <linux/regmap.h>
+
+#include <soc/tenstorrent/atlantis-syscon.h>
+#include <dt-bindings/clock/tenstorrent,atlantis-syscon.h>
+
+struct atlantis_reset_data {
+ u8 bit;
+ u16 reg;
+ bool active_low;
+};
+
+struct atlantis_reset_controller_data {
+ const struct atlantis_reset_data *reset_data;
+ size_t count;
+};
+
+struct atlantis_reset_controller {
+ struct reset_controller_dev rcdev;
+ const struct atlantis_reset_controller_data *data;
+ struct regmap *regmap;
+};
+
+#define to_atlantis_reset_controller(_rcdev) \
+ container_of((_rcdev), struct atlantis_reset_controller, rcdev)
+
+#define RESET_DATA(_reg, _bit, _active_low) \
+ { \
+ .bit = _bit, .reg = _reg, .active_low = _active_low, \
+ }
+
+static const struct atlantis_reset_data atlantis_rcpu_resets[] = {
+ [RST_SMNDMA0] = RESET_DATA(RCPU_BLK_RST_REG, 0, true),
+ [RST_SMNDMA1] = RESET_DATA(RCPU_BLK_RST_REG, 1, true),
+ [RST_WDT0] = RESET_DATA(RCPU_BLK_RST_REG, 2, true),
+ [RST_WDT1] = RESET_DATA(RCPU_BLK_RST_REG, 3, true),
+ [RST_TMR] = RESET_DATA(RCPU_BLK_RST_REG, 4, true),
+ [RST_PVTC] = RESET_DATA(RCPU_BLK_RST_REG, 12, true),
+ [RST_PMU] = RESET_DATA(RCPU_BLK_RST_REG, 13, true),
+ [RST_MAILBOX] = RESET_DATA(RCPU_BLK_RST_REG, 14, true),
+ [RST_SPACC] = RESET_DATA(RCPU_BLK_RST_REG, 26, true),
+ [RST_OTP] = RESET_DATA(RCPU_BLK_RST_REG, 28, true),
+ [RST_TRNG] = RESET_DATA(RCPU_BLK_RST_REG, 29, true),
+ [RST_CRC] = RESET_DATA(RCPU_BLK_RST_REG, 30, true),
+
+ [RST_QSPI] = RESET_DATA(LSIO_BLK_RST_REG, 0, true),
+ [RST_I2C0] = RESET_DATA(LSIO_BLK_RST_REG, 1, true),
+ [RST_I2C1] = RESET_DATA(LSIO_BLK_RST_REG, 2, true),
+ [RST_I2C2] = RESET_DATA(LSIO_BLK_RST_REG, 3, true),
+ [RST_I2C3] = RESET_DATA(LSIO_BLK_RST_REG, 4, true),
+ [RST_I2C4] = RESET_DATA(LSIO_BLK_RST_REG, 5, true),
+ [RST_UART0] = RESET_DATA(LSIO_BLK_RST_REG, 6, true),
+ [RST_UART1] = RESET_DATA(LSIO_BLK_RST_REG, 7, true),
+ [RST_UART2] = RESET_DATA(LSIO_BLK_RST_REG, 8, true),
+ [RST_UART3] = RESET_DATA(LSIO_BLK_RST_REG, 9, true),
+ [RST_UART4] = RESET_DATA(LSIO_BLK_RST_REG, 10, true),
+ [RST_SPI0] = RESET_DATA(LSIO_BLK_RST_REG, 11, true),
+ [RST_SPI1] = RESET_DATA(LSIO_BLK_RST_REG, 12, true),
+ [RST_SPI2] = RESET_DATA(LSIO_BLK_RST_REG, 13, true),
+ [RST_SPI3] = RESET_DATA(LSIO_BLK_RST_REG, 14, true),
+ [RST_GPIO] = RESET_DATA(LSIO_BLK_RST_REG, 15, true),
+ [RST_CAN0] = RESET_DATA(LSIO_BLK_RST_REG, 17, true),
+ [RST_CAN1] = RESET_DATA(LSIO_BLK_RST_REG, 18, true),
+ [RST_I2S0] = RESET_DATA(LSIO_BLK_RST_REG, 19, true),
+ [RST_I2S1] = RESET_DATA(LSIO_BLK_RST_REG, 20, true),
+
+};
+
+static const struct atlantis_reset_controller_data atlantis_rcpu_reset_data = {
+ .reset_data = atlantis_rcpu_resets,
+ .count = ARRAY_SIZE(atlantis_rcpu_resets),
+};
+
+static int atlantis_reset_update(struct reset_controller_dev *rcdev,
+ unsigned long id, bool assert)
+{
+ unsigned int val;
+ struct atlantis_reset_controller *rst =
+ to_atlantis_reset_controller(rcdev);
+ const struct atlantis_reset_data *data = &rst->data->reset_data[id];
+ unsigned int mask = BIT(data->bit);
+ struct regmap *regmap = rst->regmap;
+
+ if (data->active_low ^ assert)
+ val = mask;
+ else
+ val = ~mask;
+
+ return regmap_update_bits(regmap, data->reg, mask, val);
+}
+
+static int atlantis_reset_assert(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ return atlantis_reset_update(rcdev, id, true);
+}
+
+static int atlantis_reset_deassert(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ return atlantis_reset_update(rcdev, id, false);
+}
+
+static const struct reset_control_ops atlantis_reset_control_ops = {
+ .assert = atlantis_reset_assert,
+ .deassert = atlantis_reset_deassert,
+};
+
+static int
+atlantis_reset_controller_register(struct device *dev,
+ struct atlantis_reset_controller *controller)
+{
+ struct reset_controller_dev *rcdev = &controller->rcdev;
+
+ rcdev->ops = &atlantis_reset_control_ops;
+ rcdev->owner = THIS_MODULE;
+ rcdev->of_node = dev->of_node;
+ rcdev->nr_resets = controller->data->count;
+
+ return devm_reset_controller_register(dev, &controller->rcdev);
+}
+static int atlantis_reset_probe(struct auxiliary_device *adev,
+ const struct auxiliary_device_id *id)
+{
+ struct atlantis_ccu_adev *rdev = to_atlantis_ccu_adev(adev);
+ struct atlantis_reset_controller *controller;
+ struct device *dev = &adev->dev;
+
+ controller = devm_kzalloc(dev, sizeof(*controller), GFP_KERNEL);
+ if (!controller)
+ return -ENOMEM;
+ controller->data =
+ (const struct atlantis_reset_controller_data *)id->driver_data;
+ controller->regmap = rdev->regmap;
+
+ return atlantis_reset_controller_register(dev, controller);
+}
+
+static const struct auxiliary_device_id atlantis_reset_ids[] = {
+ { .name = "atlantis_ccu.rcpu-reset",
+ .driver_data = (kernel_ulong_t)&atlantis_rcpu_reset_data },
+ {},
+};
+MODULE_DEVICE_TABLE(auxiliary, atlantis_reset_ids);
+
+static struct auxiliary_driver atlantis_reset_driver = {
+ .probe = atlantis_reset_probe,
+ .id_table = atlantis_reset_ids,
+};
+module_auxiliary_driver(atlantis_reset_driver);
+
+MODULE_AUTHOR("Anirudh Srinivasan <asrinivasan at oss.tenstorrent.com>");
+MODULE_DESCRIPTION("Atlantis reset controller driver");
+MODULE_LICENSE("GPL");
--
2.43.0
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