[PATCH 3/5] dt-bindings: riscv: cpus: document performance-domains property

[Joshua Yeong]

The property is defined as a phandle array referencing an RPMI
performance domain provider, with the domain specifier interpreted
according to the bindings of the referenced RPMI performance controller.

Signed-off-by: Joshua Yeong <joshua.yeong at starfivetech.com>
---
 Documentation/devicetree/bindings/riscv/cpus.yaml | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml
index d733c0bd534f..a7c38d078981 100644
--- a/Documentation/devicetree/bindings/riscv/cpus.yaml
+++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
@@ -143,6 +143,13 @@ properties:
       DMIPS/MHz, relative to highest capacity-dmips-mhz
       in the system.
 
+  performance-domains:
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+    description:
+      A phandle and RPMI performance domain specifier, as defined by the
+      bindings of the referenced RPMI performance controller or provider.
+      (see riscv,rpmi-performance.yaml / riscv,rpmi-mpxy-performance.yaml)
+
 anyOf:
   - required:
       - riscv,isa
-- 
2.43.0