[PATCH v2 0/2] riscv: Introduce support for hardware break/watchpoints
Himanshu Chauhan
himanshu.chauhan at oss.qualcomm.com
Tue Jan 6 00:20:19 PST 2026
This patchset adds support of hardware breakpoints and watchpoints in RISC-V
architecture. The framework is built on top of perf subsystem and SBI debug
trigger extension.
Currently following features are not supported and are in works:
- Ptrace support
- Single stepping
- Virtualization of debug triggers
The SBI debug trigger extension proposal can be found in Chapter-19 of SBI specification:
https://github.com/riscv-non-isa/riscv-sbi-doc/releases/download/v3.0/riscv-sbi.pdf
The Sdtrig ISA is part of RISC-V debug specification which can be found at:
https://github.com/riscv/riscv-debug-spec
Changes from v1:
- The patch that adds the extension and the function IDs defined by the extension is
already merged. So this patch builds on top of that.
- Added breakpoint test application in self tests to test debug triggers
How to use:
~~~~~~~~~~~
OpenSBI:
https://github.com/riscv-software-src/opensbi.git
Qemu:
https://github.com/qemu/qemu.git
Linux Kernel:
https://github.com/hschauhan/riscv-linux/tree/sdtrig-v2-upstream has these patches pre-applied
and based on v6.19-rc4.
or
You can pull v6.19-rc4 branch from Linus' Tree and apply these patches.
How to test:
~~~~~~~~~~~
>From the Linux kernel directory issue the following command:
make -C tools/testing/selftests/breakpoints/
This will make a binary named breakpoint_test_riscv under the same directory.
Load it on the machine and run. Sample output is given below:
/ # /apps/breakpoint_test_riscv
breakpoint triggered!
Breakpoint test passed!
watchpoint triggered!
Watchpoint test passed!
Himanshu Chauhan (2):
riscv: Introduce support for hardware break/watchpoints
riscv: Add breakpoint and watchpoint test for riscv
arch/riscv/Kconfig | 1 +
arch/riscv/include/asm/hw_breakpoint.h | 320 +++++++++
arch/riscv/include/asm/kdebug.h | 3 +-
arch/riscv/kernel/Makefile | 1 +
arch/riscv/kernel/hw_breakpoint.c | 657 ++++++++++++++++++
arch/riscv/kernel/traps.c | 6 +
tools/testing/selftests/breakpoints/Makefile | 5 +
.../breakpoints/breakpoint_test_riscv.c | 172 +++++
8 files changed, 1164 insertions(+), 1 deletion(-)
create mode 100644 arch/riscv/include/asm/hw_breakpoint.h
create mode 100644 arch/riscv/kernel/hw_breakpoint.c
create mode 100644 tools/testing/selftests/breakpoints/breakpoint_test_riscv.c
--
2.43.0
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