[PATCH 2/3] riscv: kvm: Fix vstimecmp update hazard on RV32

[Anup Patel]

On Sat, Jan 3, 2026 at 3:16 PM Naohiko Shimizu
<naohiko.shimizu at gmail.com> wrote:

Same comment as PATCH1.

>
> Signed-off-by: Naohiko Shimizu <naohiko.shimizu at gmail.com>
> ---
>  arch/riscv/kvm/vcpu_timer.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/kvm/vcpu_timer.c b/arch/riscv/kvm/vcpu_timer.c
> index 85a7262115e1..f36247e4c783 100644
> --- a/arch/riscv/kvm/vcpu_timer.c
> +++ b/arch/riscv/kvm/vcpu_timer.c
> @@ -72,8 +72,9 @@ static int kvm_riscv_vcpu_timer_cancel(struct kvm_vcpu_timer *t)
>  static int kvm_riscv_vcpu_update_vstimecmp(struct kvm_vcpu *vcpu, u64 ncycles)
>  {
>  #if defined(CONFIG_32BIT)
> -       ncsr_write(CSR_VSTIMECMP, ncycles & 0xFFFFFFFF);
> +       ncsr_write(CSR_VSTIMECMP,  ULONG_MAX);
>         ncsr_write(CSR_VSTIMECMPH, ncycles >> 32);
> +       ncsr_write(CSR_VSTIMECMP, (u32)ncycles);
>  #else
>         ncsr_write(CSR_VSTIMECMP, ncycles);
>  #endif
> @@ -307,8 +308,9 @@ void kvm_riscv_vcpu_timer_restore(struct kvm_vcpu *vcpu)
>                 return;
>
>  #if defined(CONFIG_32BIT)
> -       ncsr_write(CSR_VSTIMECMP, (u32)t->next_cycles);
> +       ncsr_write(CSR_VSTIMECMP, ULONG_MAX);
>         ncsr_write(CSR_VSTIMECMPH, (u32)(t->next_cycles >> 32));
> +       ncsr_write(CSR_VSTIMECMP, (u32)(t->next_cycles));
>  #else
>         ncsr_write(CSR_VSTIMECMP, t->next_cycles);
>  #endif
> --
> 2.39.5
>
>
> --
> kvm-riscv mailing list
> kvm-riscv at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/kvm-riscv

Regards,
Anup