[PATCH v2] clk: spacemit: k3: add 1.8 GHz PLL5 and PLL8 rates

[Troy Mitchell]

On Mon Aug 31, 2026 at 1:25 AM +08, Aurelien Jarno wrote:
> Hi Troy,
>
> On 2026-08-10 16:46, Troy Mitchell wrote:
>> K3 boot firmware configures the C2 and C3 CPU clock domains at
>> 1.8 GHz. PLL5 feeds C2 and PLL8 feeds C3, but their rate tables
>> currently contain only the 2 GHz overclocking operating point.
>> 
>> Add the nominal 1.8 GHz configuration as the first entry in both
>> tables. This lets determine_rate() and set_rate() select the firmware
>> operating point while retaining 2 GHz as a supported overclocking rate.
>> 
>> Signed-off-by: Troy Mitchell <troy.mitchell at linux.spacemit.com>
>> ---
>> The related U-Boot change is available at:
>> https://github.com/spacemit-com/uboot-2022.10/commit/fb95cf3d848b771c61b5a1b3e5cbbee223faf352
>> ---
>> Changes in v2:
>> - Drop "clk: spacemit: re-enable PLLs after init"; the PLL init issue
>>   will be handled in a separate series.
>> - Send the K3 PLL5 and PLL8 1.8 GHz rate-table update as a standalone
>>   patch.
>> - Clarify that 1.8 GHz is nominal and 2 GHz is an overclocking rate.
>> - Link to v1: https://patch.msgid.link/20260804-k3-pll5-pll8-1800mhz-v1-0-a3a75866ce32@linux.spacemit.com
>
> This make sense and looks good:
>
> Reviewed-by: Aurelien Jarno <aurelien at aurel32.net>
> Tested-by: Aurelien Jarno <aurelien at aurel32.net>
>
> I wonder if it should be backported to stable, as users will deploy 
> newer firmware.
Yes. I'll Cc: stable at vger.kernel.org in the next version.

Thanks for your tags.

-- 
Troy Mitchell

-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 248 bytes
Desc: not available
URL: <http://lists.infradead.org/pipermail/linux-riscv/attachments/20260831/4affd407/attachment.sig>