[PATCH] clk: spacemit: k3: add 2.0 GHz PLL3 and PLL4 rates

Aurelien Jarno aurelien at aurel32.net
Sun Aug 30 11:12:01 PDT 2026


On 2026-08-30 19:28, Aurelien Jarno wrote:
> Starting with version k3-br-v1.0.7, the vendor U-Boot configures the C0
> and C1 CPU clock domains (X100 cores) to 2.0 GHz instead of 2.2 GHz.
> PLL3 feeds C0 and PLL4 feeds C1, but their rate tables currently contain
> only the 2.2 GHz overclocking operating point. This causes the linux
> kernel to hang at boot.
> 
> Add the 2.0 GHz configuration in both tables to fix the issue. Tested
> with both k3-br-v1.0.5 (X100 running at 2.2 GHz) and k3-br-v1.0.7 (X100
> cores running at 2.0 GHz).
> 
> Cc: Troy Mitchell <troy.mitchell at linux.spacemit.com>
> Cc: stable at kernel.org
> Fixes: e371a77255b8 ("clk: spacemit: k3: add the clock tree")
> Signed-off-by: Aurelien Jarno <aurelien at aurel32.net>
> ---
>  drivers/clk/spacemit/ccu-k3.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> The related U-Boot change is available at:
> https://github.com/spacemit-com/uboot-2022.10/commit/274f664150dade144df265baf7dc8e15dd9cce52

FYI, this is the Sashiko review:
https://lore.kernel.org/20260830173644.193B21F000E9@smtp.kernel.org

While I agree we can fix the SpacemiT clock driver, we'll need to add 
this rate anyway, and it immediately fixes the issue. Fixing the clock 
driver is more work and this will take more time to fix.

Regards
Aurelien

-- 
Aurelien Jarno                          GPG: 4096R/1DDD8C9B
aurelien at aurel32.net                     http://aurel32.net



More information about the linux-riscv mailing list