[PATCH 06/12] spi: dt-bindings: snps,dw-apb-ssi: Add compatible for UltraRISC DP1000 SoC

[Jia Wang]

On 2026-08-24 18:15 +0100, Conor Dooley wrote:
> On Mon, Aug 24, 2026 at 06:07:07PM +0100, Conor Dooley wrote:
> > Acked-by: Conor Dooley <conor.dooley at microchip.com>
> > pw-bot: not-applicable
> 
> And another case of being too hasty, same applies here. Please add some
> constraints for your device.
>

Thanks for the review.

In the next version, I will add DP1000-specific constraints requiring
each SPI controller to have one register range, two clocks, and the
corresponding clock names.

The num-cs property will remain optional because the native chip-select
count differs between instances and can be detected by the driver. 

> Thanks,
> Conor.

Best regards,
Jia Wang