[PATCH v4 17/21] iommu/riscv: Report cache coherency capability

Andrew Jones andrew.jones at oss.qualcomm.com
Fri Aug 21 04:15:19 PDT 2026


On Thu, Aug 20, 2026 at 06:47:30PM -0300, Jason Gunthorpe wrote:
> On Thu, Aug 20, 2026 at 11:41:46PM +0200, Andrew Jones wrote:
> > VFIO and iommufd require IOMMU_CAP_CACHE_COHERENCY because they use
> > IOMMU_CACHE mappings and have no userspace cache-maintenance path.
> > 
> > RISC-V page tables preserve physical memory attributes for IOMMU_CACHE
> > mappings. Svpbmt marks mappings without IOMMU_CACHE as non-cacheable,
> > but preserving physical attributes cannot make a noncoherent device
> > path coherent.
> > 
> > Report the capability only for devices marked DMA coherent. This limits
> > userspace assignment to paths that can honor cacheable mappings.
> > 
> > Signed-off-by: Andrew Jones <andrew.jones at oss.qualcomm.com>
> > ---
> >  drivers/iommu/riscv/iommu.c | 12 ++++++++++++
> >  1 file changed, 12 insertions(+)
> 
> Reviewed-by: Jason Gunthorpe <jgg at nvidia.com>
> 
> You can send this outside this series?

Sure

Thanks,
drew



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