[PATCH v2 1/3] dt-bindings: riscv: Add Worlds ISA extensions

Conor Dooley conor at kernel.org
Mon Aug 10 09:25:08 PDT 2026


On Thu, Jul 30, 2026 at 12:39:06AM +0800, Yu-Chien Peter Lin wrote:
> Add DT bindings for five RISC-V Worlds ISA extensions
> that implement World ID tagging for hardware-enforced
> context isolation. Also, add checks for extension
> dependency requirements.
> 
> Signed-off-by: Yu-Chien Peter Lin <peter.lin at sifive.com>
> ---
>  .../devicetree/bindings/riscv/extensions.yaml | 53 +++++++++++++++++++
>  1 file changed, 53 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
> index 2b0a8a93bb21..7a57191a0293 100644
> --- a/Documentation/devicetree/bindings/riscv/extensions.yaml
> +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
> @@ -193,12 +193,35 @@ properties:
>              ratified at commit d70011dde6c2 ("Update to ratified state")
>              of riscv-j-extension.
>  
> +        - const: smlwid
> +          description: |
> +            The standard Smlwid extension for M-mode control of lower
> +            privilege World ID via the mlwid CSR as ratified at commit
> +            TBD ("TBD") of riscv-worlds.


btw, when you send a v3 of this please mark it RFC, since you're using
placeholders here for the commit hashes of the extension being frozen.

Cheers,
Conor.
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