[PATCH RFC v3 05/11] RISC-V: QoS: add resctrl arch callbacks for CBQRI controllers
Reinette Chatre
reinette.chatre at intel.com
Thu Apr 30 16:17:22 PDT 2026
Hi Drew,
On 4/14/26 6:53 PM, Drew Fustini wrote:
> +int resctrl_arch_update_one(struct rdt_resource *r, struct rdt_ctrl_domain *d,
> + u32 closid, enum resctrl_conf_type t, u32 cfg_val)
> +{
> + struct cbqri_controller *ctrl;
> + struct cbqri_resctrl_dom *dom;
> + struct cbqri_config cfg;
> + int err = 0;
> +
> + dom = container_of(d, struct cbqri_resctrl_dom, resctrl_ctrl_dom);
> + ctrl = dom->hw_ctrl;
> +
> + if (!r->alloc_capable)
> + return -EINVAL;
> +
> + switch (r->rid) {
> + case RDT_RESOURCE_L2:
> + case RDT_RESOURCE_L3:
> + cfg.cbm = cfg_val;
> + err = cbqri_apply_cache_config(dom, closid, t, &cfg);
> + break;
> + case RDT_RESOURCE_MBA:
> + /* convert from percentage to bandwidth blocks */
> + cfg.rbwb = cfg_val * ctrl->bc.nbwblks / 100;
> + cfg.rbwb = min_t(u64, cfg.rbwb, ctrl->bc.mrbwb);
> + err = cbqri_apply_bw_config(dom, closid, t, &cfg);
(Earlier comment wondered about whether rbwb cannot just be provided
directly to cbqri_apply_bw_config().)
Apart from that it looks like this can benefit from "emulated controls"
that we mused about at https://lore.kernel.org/lkml/e788ca62-ec63-4552-978b-9569f369afd5@intel.com/
At this time this MBA resource is constrained by the 1% steps that the
default MB control supports and clearly it is emulated with a control that
can support finer granularities. I am currently working on a PoC of the
base schema descriptions on which the support for emulated controls can
be built that should be able to expose full hardware capability.
Reinette
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