[PATCH v3 0/3] microchip core-qspi gpio-cs fixes + cleanup

[Conor Dooley]

From: Conor Dooley <conor.dooley at microchip.com>

Hey Mark,

v3 with the review comment about the core handing CS_HIGH dealt with.
I noticed that in the same function there was a "raw" BIT(1), which I
replaced with a macro that the patch was already adding for use in the
setup function...

Cheers,
Conor.

CC: Conor Dooley <conor.dooley at microchip.com>
CC: Daire McNamara <daire.mcnamara at microchip.com>
CC: Mark Brown <broonie at kernel.org>
CC: Cyril Jean <cyril.jean at microchip.com>
CC: Valentina.FernandezAlanis at microchip.com
CC: linux-riscv at lists.infradead.org
CC: linux-spi at vger.kernel.org
CC: linux-kernel at vger.kernel.org

Conor Dooley (3):
  spi: microchip-core-qspi: control built-in cs manually
  spi: microchip-core-qspi: don't attempt to transmit during emulated
    read-only dual/quad operations
  spi: microchip-core-qspi: remove some inline markings

 drivers/spi/spi-microchip-core-qspi.c | 99 +++++++++++++++++++++------
 1 file changed, 79 insertions(+), 20 deletions(-)

-- 
2.53.0