[PATCH v4 0/6] Convert riscv to use the generic iommu page table

[patchwork-bot+linux-riscv at kernel.org]

Hello:

This series was applied to riscv/linux.git (fixes)
by Joerg Roedel <joerg.roedel at amd.com>:

On Fri, 27 Feb 2026 11:25:35 -0400 you wrote:
> This is a fairly straightforward conversion of the RISC-V iommu driver to
> use the now merged generic iommu page table code.
> 
> It brings support for SVNAPOT which is a 64K contiguous page. Otherwise it
> should not change the behavior.
> 
> The series disables SADE as the dirty tracking support is not implemented
> in the driver and should be done somewhat differently. The generic code
> gets further along though this does not include the format implementation
> of read and clear dirty.
> 
> [...]

Here is the summary with links:
  - [v4,1/6] iommupt: Add the RISC-V page table format
    https://git.kernel.org/riscv/c/e71e00127110
  - [v4,2/6] iommu/riscv: Disable SADE
    https://git.kernel.org/riscv/c/e93e4a6363b8
  - [v4,3/6] iommu/riscv: Use the generic iommu page table
    https://git.kernel.org/riscv/c/e5ef32191a87
  - [v4,4/6] iommu/riscv: Enable SVNAPOT support for contiguous ptes
    https://git.kernel.org/riscv/c/69541898b71a
  - [v4,5/6] iommu/riscv: Add missing GENERIC_MSI_IRQ
    https://git.kernel.org/riscv/c/c70d20b25ca3
  - [v4,6/6] iommu/riscv: Allow RISC_VIOMMU to COMPILE_TEST
    https://git.kernel.org/riscv/c/7cd0c655f02f

You are awesome, thank you!
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