[PATCH v1 07/20] dt-bindings: pinctrl: Add starfive,jhb100-sys2-pinctrl

[Krzysztof Kozlowski]

On Fri, Apr 24, 2026 at 04:13:17AM -0700, Changhuang Liang wrote:
> +description: |
> +  Pinctrl bindings for JHB100 RISC-V SoC from StarFive Technology Ltd.
> +
> +  The JHB100 SoC has 13 pinctrl domains - sys0, sys0h, sys1, sys2, per0, per1,
> +  per2, per2pok, per3, adc0, adc1, emmc, and vga.
> +  This document provides an overview of the "sys2" pinctrl domain.
> +
> +  The "sys2" domain has a pin controller which provides
> +  - function selection for GPIO pads.
> +  - GPIO pad configuration.
> +  - GPIO interrupt handling.
> +
> +  In the SYS2 Pin Controller, there are 37 multi-function GPIO_PADs. Each of them can be
> +  multiplexed to different hardware blocks through function selection. Each iopad has a maximum
> +  of up to 4 functions - 0, 1, 2, and 3. Function 0 is the default function which is the GPIO
> +  function. Function 1, 2, and 3 are the alternate functions or peripheral signals that can be
> +  routed to the iopad. The function selection can be carried out by writing the function number
> +  to the iopad function select register.
> +  Each iopad is configurable with parameters such as input-enable, internal pull-up/pull-down
> +  bias, drive strength, schmitt trigger, slew rate, and debounce width.
> +
> +  This domain contains an IO group which support voltage levels 1.8V and 3.3V
> +  1. gpiow - comprises PAD_GPIO_A36 through PAD_GPIO_A39.
> +  2. gpiow-inner - comprises PAD_GPIO_A40 through PAD_GPIO_A43.
> +
> +  This IO group must be configured with a voltage setting that matches the external voltage level
> +  provided to the IO group.

Wrap at 80.

Please wrap code according to the preferred limit expressed in Kernel
coding style (checkpatch is not a coding style description, but only a
tool).  However don't wrap blindly (see Kernel coding style).

Best regards,
Krzysztof