[PATCH v4 2/4] serial: 8250_dw: build Renesas RZN1 CPR value from DW_UART_CPR_* definitions
Ilpo Järvinen
ilpo.jarvinen at linux.intel.com
Fri Apr 24 04:38:56 PDT 2026
On Fri, 24 Apr 2026, Jia Wang wrote:
> Replace the magic CPR value for Renesas RZ/N1 with a composition using
> DW_UART_CPR_* bit/field definitions and FIELD_PREP_CONST().
>
> Signed-off-by: Jia Wang <wangjia at ultrarisc.com>
> ---
> drivers/tty/serial/8250/8250_dw.c | 10 +++++++++-
> 1 file changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c
> index 467755bf0092..d3c2c9c84d9f 100644
> --- a/drivers/tty/serial/8250/8250_dw.c
> +++ b/drivers/tty/serial/8250/8250_dw.c
> @@ -937,7 +937,15 @@ static const struct dw8250_platform_data dw8250_armada_38x_data = {
>
> static const struct dw8250_platform_data dw8250_renesas_rzn1_data = {
> .usr_reg = DW_UART_USR,
> - .cpr_value = 0x00012f32,
> + .cpr_value = FIELD_PREP_CONST(DW_UART_CPR_ABP_DATA_WIDTH, 2) |
> + DW_UART_CPR_AFCE_MODE |
> + DW_UART_CPR_THRE_MODE |
> + DW_UART_CPR_ADDITIONAL_FEATURES |
> + DW_UART_CPR_FIFO_ACCESS |
> + DW_UART_CPR_FIFO_STAT |
> + DW_UART_CPR_SHADOW |
> + DW_UART_CPR_DMA_EXTRA |
> + FIELD_PREP_CONST(DW_UART_CPR_FIFO_MODE, 0x01),
Hmm, maybe there should also be macro also for this one which takes the
fifosize as input and converts it to CPR field vlaue (effectively, the
macro is an inverse of DW_UART_CPR_FIFO_SIZE()). It would be more readable
than the literal.
Also include BUILD_BUG_ON(!IS_ALIGNED(fifosize, 16) + bounds checks)
inside that macro to catch invalid fifo sizes (+ don't forget the
necessary headers for those two new things).
--
i.
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