[PATCH v1 04/20] pinctrl: starfive: Add StarFive JHB100 sys0h controller driver
Changhuang Liang
changhuang.liang at starfivetech.com
Fri Apr 24 04:13:14 PDT 2026
Add pinctrl driver for StarFive JHB100 SoC System-0 Host(sys0h) pinctrl
controller.
Signed-off-by: Lianfeng Ouyang <lianfeng.ouyang at starfivetech.com>
Signed-off-by: Changhuang Liang <changhuang.liang at starfivetech.com>
---
drivers/pinctrl/starfive/Kconfig | 12 +++
drivers/pinctrl/starfive/Makefile | 1 +
.../starfive/pinctrl-starfive-jhb100-sys0h.c | 81 +++++++++++++++++++
3 files changed, 94 insertions(+)
create mode 100644 drivers/pinctrl/starfive/pinctrl-starfive-jhb100-sys0h.c
diff --git a/drivers/pinctrl/starfive/Kconfig b/drivers/pinctrl/starfive/Kconfig
index dc53070ee2c8..8739ed1ca350 100644
--- a/drivers/pinctrl/starfive/Kconfig
+++ b/drivers/pinctrl/starfive/Kconfig
@@ -70,3 +70,15 @@ config PINCTRL_STARFIVE_JHB100_SYS0
This also provides an interface to the GPIO pins not used by other
peripherals supporting inputs, outputs, configuring pull-up/pull-down
and interrupts on input changes.
+
+config PINCTRL_STARFIVE_JHB100_SYS0H
+ tristate "StarFive JHB100 SoC System-0 Host pinctrl and GPIO driver"
+ depends on ARCH_STARFIVE || COMPILE_TEST
+ depends on OF
+ select PINCTRL_STARFIVE_JHB100
+ default ARCH_STARFIVE
+ help
+ Say yes here to support System-0 Host pin control on the StarFive JHB100 SoC.
+ This also provides an interface to the GPIO pins not used by other
+ peripherals supporting inputs, outputs, configuring pull-up/pull-down
+ and interrupts on input changes.
diff --git a/drivers/pinctrl/starfive/Makefile b/drivers/pinctrl/starfive/Makefile
index c0d368f413bc..b26156a6d0eb 100644
--- a/drivers/pinctrl/starfive/Makefile
+++ b/drivers/pinctrl/starfive/Makefile
@@ -8,3 +8,4 @@ obj-$(CONFIG_PINCTRL_STARFIVE_JH7110_AON) += pinctrl-starfive-jh7110-aon.o
obj-$(CONFIG_PINCTRL_STARFIVE_JHB100) += pinctrl-starfive-jhb100.o
obj-$(CONFIG_PINCTRL_STARFIVE_JHB100_SYS0) += pinctrl-starfive-jhb100-sys0.o
+obj-$(CONFIG_PINCTRL_STARFIVE_JHB100_SYS0H) += pinctrl-starfive-jhb100-sys0h.o
diff --git a/drivers/pinctrl/starfive/pinctrl-starfive-jhb100-sys0h.c b/drivers/pinctrl/starfive/pinctrl-starfive-jhb100-sys0h.c
new file mode 100644
index 000000000000..42fbbcd92550
--- /dev/null
+++ b/drivers/pinctrl/starfive/pinctrl-starfive-jhb100-sys0h.c
@@ -0,0 +1,81 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Pinctrl / GPIO driver for StarFive JHB100 SoC System-0 host domain
+ *
+ * Copyright (C) 2024 StarFive Technology Co., Ltd.
+ * Author: Alex Soo <yuklin.soo at starfivetech.com>
+ *
+ */
+
+#include <linux/mod_devicetable.h>
+#include <linux/platform_device.h>
+
+#include "pinctrl-starfive-jhb100.h"
+
+static const struct jhb100_pin_layout_desc jhb100_sys0h_pl_desc[] = {
+ { .pin_start = 0, .pin_cnt = 7, .name = "gpio", .gpio_func_sel = 0 },
+ { .pin_start = 7, .pin_cnt = 1, .name = "espi0_reset", .gpio_func_sel = 1 },
+ { .pin_start = 8, .pin_cnt = 4, .name = "gpio", .gpio_func_sel = 0 },
+ { 0xff },
+};
+
+static struct config_reg_layout_desc jhb100_sys0h_pinctrl_rl_desc[] = {
+ {
+ .pin_start = 0,
+ .pin_cnt = 12,
+ .drive_strength_2bit = { .shift = 0, .width = 2 },
+ .input_enable = { .shift = 2, .width = 1 },
+ .pull_down = { .shift = 3, .width = 1 },
+ .pull_up = { .shift = 4, .width = 1 },
+ .slew_rate = { .shift = 5, .width = 1 },
+ .schmitt_trigger_select = { .shift = 6, .width = 1 },
+ .reserved = { .shift = 7, .width = 8 },
+ .debounce_width = { .shift = 15, .width = 17 },
+ },
+ { 0xff },
+};
+
+struct starfive_pinctrl_regs jhb100_sys0h_pinctrl_regs = {
+ .config = { .reg = 0x04, .width_per_pin = 1 },
+ .output = { .reg = 0x34, .width_per_pin = 1 },
+ .output_en = { .reg = 0x38, .width_per_pin = 1 },
+ .gpio_status = { .reg = 0x3c, .width_per_pin = 1 },
+ .func_sel = { .reg = 0x40, .width_per_pin = 2 },
+ .irq_en = { .reg = 0x44, .width_per_pin = 1 },
+ .irq_status = { .reg = 0x48, .width_per_pin = 1 },
+ .irq_clr = { .reg = 0x4c, .width_per_pin = 1 },
+ .irq_trigger = { .reg = 0x50, .width_per_pin = 1 },
+ .irq_level = { .reg = 0x54, .width_per_pin = 1 },
+ .irq_both_edge = { .reg = 0x58, .width_per_pin = 1 },
+ .irq_edge = { .reg = 0x5c, .width_per_pin = 1 },
+};
+
+static struct jhb100_pinctrl_domain_info jhb100_sys0h_pinctrl_info = {
+ .name = "jhb100-sys0h",
+ .gc_base = -1,
+ .pl_desc = jhb100_sys0h_pl_desc,
+ .crl_desc = jhb100_sys0h_pinctrl_rl_desc,
+ .regs = &jhb100_sys0h_pinctrl_regs,
+};
+
+static const struct of_device_id jhb100_sys0h_pinctrl_of_match[] = {
+ {
+ .compatible = "starfive,jhb100-sys0h-pinctrl",
+ .data = &jhb100_sys0h_pinctrl_info,
+ },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, jhb100_sys0h_pinctrl_of_match);
+
+static struct platform_driver jhb100_sys0h_pinctrl_driver = {
+ .probe = jhb100_pinctrl_probe,
+ .driver = {
+ .name = "starfive-jhb100-sys0h-pinctrl",
+ .of_match_table = jhb100_sys0h_pinctrl_of_match,
+ },
+};
+module_platform_driver(jhb100_sys0h_pinctrl_driver);
+
+MODULE_DESCRIPTION("Pinctrl driver for StarFive JHB100 SoC System-0 host domain");
+MODULE_AUTHOR("Alex Soo <yuklin.soo at starfivetech.com>");
+MODULE_LICENSE("GPL");
--
2.25.1
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